Journal of the Microelectronics and Packaging Society

본 연구에서는 실험 설계법을 통해 인터포저에서 Through Silicon Via (TSV) 및 Redistributed Layer (RDL) 의 구조적 변형에 따른 삽입 손실 특성 변화를 확인하였다. 이때 3-요인으로 TSV depth, TSV diameter, RDL width를 선 정하여, 구조적 변형을 일으켰을 때 400 MHz~20 GHz에서의 삽입 손실을 EM (Electromagnetic) tool Ansys HFSS(High Frequency Simulation Software)를 통해 확인하였다. 반응 표면법을 고려하였다. 그 결과 주파수가 높아질수록 RDL width 의 영향이 감소하고 TSV depth와 TSV diameter의 영향이 증가하는 것을 확인했다. 또한 분석 범위 내에서 RDL width 를 증가시키면서 TSV depth를 감소시키고 TSV diameter를 약 10.7 μm 고정하는 것이 삽입 손실을 가장 최적화 시키는 결과가 관찰되었다.
In this study, Insertion loss according to the structural variant of interposer to Through Silicon Via (TSV) and Redistributed Layer (RDL) was studied through design of experiment. 3-Factors was considered as a variant, TSV depth, TSV diameter, RDL width with factor arrangement method and the response surface method from 400 MHz to 20 GHz. As a result, it was confirmed that as the frequency increased, the effect of RDL width was decreased and the effect of TSV depth and TSV diameter was increased. Also within the analysis range, to increasing RDL width, decreasing TSV depth, and fixing TSV diameter about 10.7 μm was observed optimal result of Insertion loss.

Keywords TSV, Interposer, HBM, RDL, FEA