Journal of the Microelectronics and Packaging Society

This paper addresses the significance of Cu/Polymer Hybrid Bonding technology in the advancement of semiconductor packaging. As the demands of the AI era increase, the semiconductor industry is exploring heterogeneous integration packaging technologies to achieve high I/O counts, low power consumption, efficient heat dissipation, multifunctionality, and miniaturization. The conventional Cu/SiO₂ Hybrid Bonding structure faces limitations such as achieving compatibility with CMP processes to attain surface roughness below 1nm and the occurrence of bonding defects due to particles. However, Cu/Polymer Hybrid Bonding technology, utilizing polymers, is gaining attention as a promising alternative to overcome these challenges. This study focuses on the deposition, patterning, and material properties of polymers essential for Cu/Polymer Hybrid Bonding, highlighting the advantages and potential applications of this technology compared to existing methods. Specifically, the use of polymers with low glass transition temperatures (Tg) is discussed for their benefits in low-temperature bonding processes and improved mechanical properties due to their high coefficients of thermal expansion. Furthermore, the study explores surface property modifications of polymers and the enhancement of bonding mechanisms through plasma treatment. This research emphasizes that Cu/Polymer Hybrid Bonding technology can serve as a critical breakthrough in developing high-performance, low-power semiconductor devices within the industry.

3D IC Package, Hybrid Bonding, Polymer Dielectric, Cu/Polymer Hybrid Bonding

This paper discusses Chip On Film (COF) technology, one of the key technologies in flexible packaging to enable miniaturization and flexibility of electronic devices. COF attaches Display Driver IC (DDI) directly to a flexible polyimide substrate, enabling lightweight and reduced thickness for high-resolution displays. COF technology is primarily used in high-performance display panels, such as organic light emitting diode (OLED) displays, and plays a key role in portable electronic devices, such as smartphones and wearable devices. This study analyzes the key components of COF and advances in bonding technology. In particular, the introduction of modern bonding techniques, such as thermocompression bonding and thermo-sonic bonding, has led to significant improvements in bonding reliability and electrical performance. These bonding techniques enhance the mechanical stability of COF packages while maintaining high electrical connectivity in fine-pitch structures. This paper will discuss the future development of COF bonding technology and its challenges and explore its potential as a next-generation display and advanced packaging technology.

Chip On Film, Flexible Package, Thermo-compression bonding, Anisotropic conductive, Non-conductive

Nanoimprint lithography (NIL) is widely used to form structures ranging from micro to nanoscale due to its advantage of generating high-resolution patterns at a low process cost. However, most NIL processes require the use of imprint resists and external elements such as ultraviolet light or heat, necessitating additional post-processes like etching or metal deposition to pattern the target material. Furthermore, patterning on flexible and/or non-planar films presents significant challenges. This study introduces an extreme pressure imprint lithography (EPIL) process that can form micro- /nano-scale patterns on the surface of a flexible rubber magnet composite (RMC) film at room temperature without an etching process. The EPIL technique can form ultrafine structures over large areas through the plastic deformation of various materials, including metals, polymers, and ceramics. In this study, we demonstrate the process and outcomes of creating a variety of periodic structures with diverse pattern sizes and shapes on the surface of a flexible RMC composed of strontium ferrite and chlorinated polyethylene. The EPIL process, which allows for the precise patterning on the surface of RMC materials, is expected to find broad applications in the production of advanced electromagnetic device components that require fine control and changes in magnetic orientation.

Imprint lithography, Rubber magnetic composition, Nanostructure, Nanopatterning

Due to the thin nature of semiconductor packages, even minor thermal loads can cause significant warpage, impacting product reliability through issues like delamination or cracking. The mold curing process, which encloses the package to protect the semiconductor chip, is particularly challenging to predict due to the complex thermal, chemical, and mechanical interactions. This study proposes a cost-effective machine learning model to predict warpage in the mold curing process. We developed methods to characterize the curing degree based on time and temperature and quantify the material's mechanical properties accordingly. A Finite Element Method (FEM) simulation model was created by integrating these properties into ABAQUS UMAT to predict warpage for various design factors. Additionally, a Warpage formula was developed to estimate local warpage based on the package's stacking structure. This formula combines bending theory with thermo-chemical-mechanical properties and was validated through FEM simulation results. The study presents a method to construct a machine learning model for warpage prediction using this formula and proposes a cost-effective approach for building a training dataset by analyzing input variables and design factors. This methodology achieves over 98% prediction accuracy and reduces simulation time by 96.5%.

Warpage, Curing process, FEM simulation, Cost-effective, Physics informed machine Learning

In semiconductor manufacturing, the alignment process is fundamental to all manufacturing steps, and alignment errors are inevitably introduced. These alignment errors can lead to issues such as increased resistance, signal delay, and degradation. This study systematically analyzes the changes in the electrical characteristics of the bonding interface when alignment errors occur in metal interconnect and bonding structures. The results show that current density tends to concentrate at the edges of the bonding interface, with the middle part of the interface being particularly vulnerable. As alignment errors increase, the current path redistributes, causing previously concentrated current areas to disappear and an effect similar to an increase in contact area, resulting in a decrease in resistance in certain vulnerable parts. These findings suggest that proposing structural improvements to eliminate the vulnerable parts of the bonding interface could lead to interconnect with significantly improved resistance performance compared to existing structure. This study clarifies the impact of alignment errors on electrical characteristics, which is expected to play a crucial role in optimizing the electrical performance of semiconductor devices and enhancing the efficiency of the manufacturing process.

Bonding, Current density, Bonding interface, Contact resistance, Misalignment, Metal interconnects

In the electromagnetic wave shielding material market, superior shielding performance in the high-frequency range, along with flexibility and durability, has emerged as critical requirements. The need for high-performance EMI (Electromagnetic Interference) films to address electromagnetic wave interference issues is growing, particularly in various industrial sectors such as smart electronic devices, automotive electronic systems, and communication equipment. In this study, a trimodal silver paste was developed and fabricated into an EMI film, with its performance evaluated. The developed silver paste, utilizing a modified epoxy binder, exhibited properties suitable for screen printing processes. The film demonstrated excellent shielding performance, with an average attenuation of -99 dB in the high-frequency range of the 5G spectrum (26.5 GHz to 40 GHz), and a shielding effectiveness of -90.3 dB at 33.6 GHz. Flexibility and durability tests showed that the film maintained its flexibility even at a curvature radius of 1 mm. In the bending cycle test, the resistance increased by approximately 25.5% from 0.51 Ω to 0.64 Ω after 10,000 cycles in the outer bending scenario, while in the inner bending scenario, the resistance decreased by about 3.6%, indicating reduced resistance to compressive stress.

Electromagnetic interference shielding, Trimodal silver paste, Flexible shielding film, High frequency

Recently, applying a machine learning to surrogate modeling for rapid optimization of complex designs have been widely researched. Once trained, the machine learning surrogate model can predict similar outputs to Finite Element Analysis (FEA) simulations but require significantly less computing resources. In addition, combined with optimization methodologies, it can identify optimal design variable with less time requirement compared to iterative simulation. This study proposes a Deep Neural Network (DNN) model with Bayesian Optimization (BO) approach for efficiently searching the optimal design variables to minimize the warpage of electronic package. The DNN model was trained by using design variable-warpage dataset from FEA simulation, and the Bayesian optimization was applied to find the optimal design variables which minimizing the warpage. The suggested DNN + BO model shows over 99% consistency compared to actual simulation results, while only require 15 second to identify optimal design variable, which reducing the optimization time by more than 57% compared to FEA simulation.

Deep Neural Network, Bayesian Optimization, Electronics package, Finite Element Analysis

In a semiconductor system, the operation of sensors plays a crucial role in recognizing information, serving as the starting point for processing external information. This study evaluates the applicability of semiconductor systems by analyzing the operational characteristics of ultraviolet (UV) detection devices using gallium oxide. Gallium oxide exhibits a property where its resistance changes in response to UV light, making it feasible to implement detection devices utilizing this material. However, to determine its applicability in semiconductor systems, detailed studies on its operational characteristics are necessary. In this study, by varying the size of the electrodes, we assessed whether the formation of current paths in gallium oxide in response to UV light is localized. Additionally, we confirmed the response speed to UV light, comparable to commercially available products, through electrical measurements. Through this, we verified the commercial applicability of gallium oxide and its potential integration into various semiconductor systems.

Sensor device, Device engineering, Electrical analysis, UV detector

A statistical approach to inspection of the 3-D shape of micro solder balls is proposed, where an optical method with spatially arranged LED and specular reflection is used. The reflected image captured by a vision system was analyzed to calculate the relative displacements of LED’s in the image. Also, the statistics of displacements for the micro solder balls contained in a captured image are used to detect existing defects, and the usefulness of the proposed method is shown via experiments.

Micro solder ball, 3-D shape inspection, Machine vision

A smart window based on a retarder can transmit or block polarized lights by overlapping two smart windows. In the study, tests were conducted to evaluate the performance of blocking solar heat using smart windows with a size of 300×300 ㎟. Solar heat gain coefficient (SHGC) values were derived through simulation using transmission and reflectance data of the smart windows. As a result of the simulation, it showed that SGHC is effective in blocking solar heat by obtaining values of 0.722 and 0.615 in transmission and blocking mode of smart windows, respectively. The test boxes were fabricated in order to verify the effect of suppressing temperature rise when applying smart windows, the inside temperature in test boxes, which are installed bare glass (reference) and two smart windows with transmission and blocking mode, were measured at 10 minutes-interval for 7 days. As of 1 p.m., the inside temperature of the test boxes with the smart windows applied showed lower temperature compared to the reference. In particular, on the day when the temperature of reference box was the highest at 66.1℃, the temperature of the test box with the smart window applied showed 61.0℃, which was lowered by 5.1℃.

Smart window, Phase retardation, Retarder, Solar heat, Transmittance-variable

To realize high speed and high bandwidth in the 2.xD package structure, methods requiring high technology are being studied for processes such as interposer or bridge die bonding, as well as heterogeneous chip bonding. Particularly, the grinding process of bonding surfaces is considered a key technology. The method of bonding an interposer or bridge die including Cu layers to a substrate and then exposing metallic materials such as Cu, which can be electrically connected, through a grinding process to connect heterogeneous chips is an approach that utilizes conventional packaging techniques. However, to meet the yield and quality standards required for mass production in processes involving the largescale bonding of micro-bumps, as seen in 2.xD packages, it is essential to develop techniques based on high precision. This paper investigates the multi-material grinding process for heterogeneous chip bonding in a 2.xD package structure, using the grit size of the grinding wheel as a variable. The study examines the surface patterns and bonding characteristics of the exposed materials achieved through the grinding process. Through this study, we aim to optimize the grinding process for high-quality bonding, thereby contributing to the development of advanced packaging technologies.

2.xD packaging, Package grinding, Surface patterns, Bonding characteristics

Polyimide has advantages that are different with other polymers, such as high thermal stability, heat resistance, and high chemical resistance. Various application methods for Polyimide have been studied. In this study, research was conducted to manufacture Polyimide films. While implementing Polyimide films with excellent adhesion and pencil hardness through optimized manufacturing conditions, the applicability as a packaging material was considered by adding glass flakes to reduce oxygen permeability. As a result, Polyimide films with glass flakes and (3-Aminopropyl)triethoxysilane have a thickness of about 50 μm were uniformly implemented, and it was confirmed that the adhesion of Polyimide films was 4B, pencil hardness was 5H, and oxygen permeability was below 8.795 × 10^-9 cc/s, respectively.

Polyimide, Glass flake, (3-Aminopropyl)triethoxysilane, Oxygen permeability, Pencil hardness, Adhesion

Currently, when oxides are used as insulators in hybrid bonding for 3D integration, they are prone to delamination due to their surface characteristics, and the RC delay value due to the resistance of the metal and the capacitance of the insulator increases as the wiring of the semiconductor chip becomes longer. To solve these problems, we studied the optimization of the conditions of the polymer insulator bonding method for hybrid bonding. To check the possibility of the de-wetting method, we coated a polymer film on the existing micro pillar and conducted hot-press bonding to remove the polymer between the metals. Through this study, it is expected that the introduction of polymers as insulators in hybrid bonding and fine-pitch metal bonding will improve signal transmission speed by reducing RC delay. It is also expected to be commercialized in the future to increase the number of I/O terminals by applying it to hybrid bonding.

3D integration, Hybrid bonding, Polymer dielectric, Passivation layer

This study reveals the feasibility and effectiveness of sinter bonding using an Ag nano-porous sheet at the lowest “theoretically” possible temperature of 145 °C. By uniform pressure of 10 MPa for bonding times of 5 min and 10 min at 145 and 175 °C, we achieved bonding strengths exceeding approximately 20 MPa with a only 5 min of bonding time at 145 °C. In particular, it is interesting to note that in the pressure sintering bonding process at 145 °C, bonding times of 5 and 10 min had no significant difference in strength. Even with a bonding temperature of 175 °C, the difference in average bonding strength between bonding times of 5 min (i.e., 37.6 MPa) and 10 min (i.e., 43.0 MPa) was only 5 MPa. The bonding strength was fundamentally attributed to the thickness of the Ag sintered neck in the Ag sintered layer. Microstructural analysis revealed that as the bonding temperature increased to 175 °C, the fraction of CSL Σ3 boundaries within the Ag sintered layer increased, indicating greater coalescence of Ag particles. This study systematically investigated the mechanism of bonding strength in extremely low-temperature pressure Ag sinter bonding, considering the relationship between microstructures and mechanical behaviors.

Ag nano-porous sheet, Sheet bonding, Power module, Pressure bonding process, Mechanical strength

With the advancement of power electronics technology and the increasing demand for high-efficiency power semiconductors, silicon carbide (SiC) devices have gained attention as an alternative to overcome the limitations of traditional silicon (Si) semiconductors. SiC devices enable excellent switching efficiency due to their high switching speed. However, parasitic inductance within the power module can cause voltage oscillations and overshoot phenomena, potentially leading to issues with electrical reliability and efficiency. To address these challenges, two approaches were proposed and validated. The first approach involved applying an RC snubber circuit to mitigate the effects of parasitic inductance, thereby improving electrical stability. The second approach focused on optimizing the lead-frame design to reduce parasitic inductance. Both methods were verified through simulations and experiments, demonstrating that the electrical reliability and efficiency of SiC power modules can be simultaneously improved.

Parasitic inductance, RC snubber, Double pulse test (DPT), Voltage overshoot, Switch loss, Silicon carbide (SiC)