Journal of the Microelectronics and Packaging Society

The rapid advancement of artificial intelligence (AI) technology has significantly increased the demand for large-scale data processing, highlighting the significant role of Optical I/O technology in semiconductor packaging. As AI models and high-performance computing (HPC) systems continue to grow in complexity, overcoming challenges such as the “Interconnect Wall” or “Power Wall,” which refer to interconnect bottlenecks, has become increasingly crucial. To address these challenges, Co-packaged Optics (CPO) has emerged as a promising solution, designed to enable the high-speed data transmission critical for AI and HPC systems. This paper will present Optical Interconnects, Silicon Photonics, and CPO as essential components for enhancing energy efficiency in next-generation AI and HPC implementations. In this paper, we introduce silicon photonics-based CPO technology for high-speed, low-power, and low-latency networks in next-generation HPC computing nodes designed to handle massive AI model operations. In particular, we examine the latest trends in advanced packaging—including Opto-chiplet packaging—built upon CPO and discuss its current status and future outlook.

Keywords Silicon photonics, Co-packaged optics (CPO), Advanced packaging, Optical I/O, Interconnect wall