2024

Vol.31 No.1

Editorial Office

Review

  • Journal of the Microelectronics and Packaging Society
  • Volume 29(1); 2022
  • Article

Review

Journal of the Microelectronics and Packaging Society 2022;29(1):1-6. Published online: Apr, 29, 2022

Efficient Decoupling Capacitor Optimization for Subsystem Module Package

  • HoJeong Lim, Ruben Fuentes
    Amkor Technology, Inc., 2045 East Innovation Circle, Tempe, AZ 85284, USA
Corresponding author E-mail: hojeong.lim@amkor.co.kr
Abstract

The mobile device industry demands much higher levels of integration and lower costs coupled with a growing awareness of the complete system’s configuration. A subsystem module package is similar to a board-level circuit that integrates a system function in a package beyond a System-in-Package (SiP) design. It is an advanced IC packaging solution to enhance the PDN and achieve a smaller form factor. Unlike a system-level design with a decoupling capacitor, a subsystem module package system needs to redefine the role of the capacitor and its configuration for PDN performance. Specifically, the design of package’s form factor should include careful consideration of optimal PDN performance and the number of components, which need to define the decoupling capacitor’s value and the placement strategy for a low impedance profile with associated cost benefits. This paper will focus on both the static case that addresses the voltage (IR) drop and AC analysis in the frequency domain with three specific topics. First, it will highlight the role of simulation in the subsystem module design for the PDN. Second, it will compare the performance of double-sided component placement (DSCP) motherboards with the subsystem module package and then prove the advantage of the subsystem module package. Finally, it will introduce three-terminal decoupling capacitor (decap) configurations of capacitor size, count and value for the subsystem module package to determine the optimum performance and package density based on the cost-effective model.

Keywords SiP, Module Design, AP, PDN, ESR, Decap