2024

Vol.31 No.3

Editorial Office

Review

  • Journal of the Microelectronics and Packaging Society
  • Volume 30(1); 2023
  • Article

Review

Journal of the Microelectronics and Packaging Society 2023;30(1):63-70. Published online: May, 11, 2023

Thermal Design of High Power Semiconductor Using Insulated Metal Substrate

  • JeongBongmin1,2, OhAesun2, KimSunae2, LeeGawon1, BaeHyuncheol2,3,†
    1Department of Electronic Engineering, Chungnam National University, 99, Daehak-ro, Yuseong-gu, Daejeon, 34134, Korea, 2Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea, 3University of Science & Technology, 217, Gajeong-ro, Yuseong-gu, Daejeon, 34113, Korea
Corresponding author E-mail: hcbae@etri.re.kr
Abstract

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heat-sensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

Keywords Power semiconductor, Finite element method, Electric-thermal analysis, Direct bonded copper, Insulated metal substrate

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