2024

Vol.31 No.2

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  • Journal of the Microelectronics and Packaging Society
  • Volume 30(3); 2023
  • Article

Review

Journal of the Microelectronics and Packaging Society 2023;30(3):1-10. Published online: Nov, 9, 2023

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DOI : doi.org/10.6117/kmeps.2023.30.3.001

Recent Advances in Fine Pitch Cu Pillar Bumps for Advanced Semiconductor Packaging

  • Eun-Chae Noh, Hyo-Won Lee, and Jeong-Won Yoon†
    Department of Advanced Materials Engineering, Chungbuk National University, Chungdae-ro, Seowon-gu, Cheongju, Chungbuk 28644, Korea
Corresponding author E-mail: jwyoon@chungbuk.ac.k
Abstract

Recently, as the demand for high-performance computers and mobile products increases, semiconductor packages are becoming high-integration and high-density. Therefore, in order to transmit a large amount of data at once, micro bumps such as flip-chip and Cu pillar that can reduce bump size and pitch and increase I/O density are used. However, when the size of the bumps is smaller than 70 μm, the brittleness increases and electrical properties decrease due to the rapid increase of the IMC volume fraction in the solder joint, which deteriorates the reliability of the solder joint. Therefore, in order to improve these issues, a layer that serves to prevent diffusion is inserted between the UBM (Under Bump Metallization) or pillar and the solder cap. In this review paper, various studies to improve bonding properties by suppressing excessive IMC growth of micro-bumps through additional layer insertion were compared and analyzed.

Keywords 3D IC Package, Micro-bumps, Cu pillar, Intermetallic compound, Diffusion barrier

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