Vol.30 No.4

Editorial Office


  • Journal of the Microelectronics and Packaging Society
  • Volume 30(4); 2023
  • Article


Journal of the Microelectronics and Packaging Society 2023;30(4):98-104. Published online: Feb, 20, 2024

Fabrication of Porous Cu Layers on Cu Pillars through Formation of Brass Layers and Selective Zn Etching, and Cu-to-Cu Flip-chip Bonding

  • Wan-Geun Lee1 , Kwang-Seong Choi2 , Yong-Sung Eom2 , and Jong-Hyun Lee1†
    1Department of Materials Science & Engineering, Seoul National University of Science and Technology, Seoul 01811, Republic of Korea, 2Low-Carbon Integration Tech, Creative Research Section, ETRI, Daejeon 34129, Republic of Korea
Corresponding author E-mail: pljh@snut.ac.kr

The feasibility of an efficient process proposed for Cu-Cu flip-chip bonding was evaluated by forming a porous Cu layer on Cu pillar and conducting thermo-compression sinter-bonding after the infiltration of a reducing agent. The porous Cu layers on Cu pillars were manufactured through a three-step process of Zn plating-heat treatment-Zn selective etching. The average thickness of the formed porous Cu layer was approximately 2.3 µm. The flip-chip bonding was accomplished after infiltrating reducing solvent into porous Cu layer and pre-heating, and the layers were finally conducted into sintered joints through thermo-compression. With reduction behavior of Cu oxides and suppression of additional oxidation by the solvent, the porous Cu layer densified to thickness of approximately 1.1 µm during the thermo-compression, and the CuCu flip-chip bonding was eventually completed. As a result, a shear strength of approximately 11.2 MPa could be achieved after the bonding for 5 min under a pressure of 10 MPa at 300 ℃ in air. Because that was a result of partial bonding by only about 50% of the pillars, it was anticipated that a shear strength of 20 MPa or more could easily be obtained if all the pillars were induced to bond through process optimization.

Keywords Porous Cu layer, Flip-chip bonding, Zn plating, Zn selective etching, Thermo-compression sinter-bonding

  • J. H. Lau, "Recent Advances and New Trends in Flip Chip Technology", J. Electron. Packag., 138(3), 030802 (2016).
  • A. Roshanghias, A. Rodrigues, S. Schwarz, and A. Steiger-Thirsfeld, "Thermosonic direct Cu pillar bonding for 3D die stacking", SN Appl. Sci., 2(6), 1-9 (2020).
  • M. S. Kim, M. S. Kang, J. H. Bang, C. W. Lee, M. S. Kim, and S. Yoo, "Interfacial reactions of fine-pitch Cu/Sn-3.5Ag pillar joints on Cu/Zn and Cu/Ni under bump metallurgies", Journal of Alloys and Compounds, 616, 394-400 (2014).
  • J. B. Kwak and S. Chung, "Thermal fatigue reliability for Cu-Pillar bump interconnection in flip chip on module and underfill effects", Soldering and Surface Mount Technology, 27(1), 1-6 (2015).
  • Y. Ma, A. Roshanghias, and A. Binder, "A comparative study on direct Cu-Cu bonding methodologies for copper pillar bumped flip-chips", J. Mater. Sci.: Mater. Electron., 29(11), 9347-9353 (2018).
  • S. L. P.-Siang, V. S. Rao, H. W. Yin, W. L. Ching, V. Kripesh, C. Lee, J. Lau, J. Milla, and A. Fenner, "Process development and reliability of microbumps", IEEE Transactions on Components and Packaging Technologies, 33(4), 747-753 (2010).
  • E. C. Noh, H. W. Lee, and J. W. Yoon, "Recent Advances in Fine Pitch Cu Pillar Bumps for Advanced Semiconductor Packaging", J. Microelectron. Packag. Soc., 30(3), 1-10 (2023).
  • J. S. Lee, H. S. Lee, M. S. Kim, S. S. Kim, and K. M, "A Study on Flux Immunity MUF for Improving Flip Chip PKG Reliability", J. Microelectron. Packag. Soc., 29(2), 49-52 (2022).
  • J. W. Nah, J. H. Kim, H. M. Lee, and K. W. Paik, "Electromigration in flip chip solder bump of 97Pb-3Sn/37Pb-63Sn combination structure", Acta Materialia, 52(1), 129-136 (2004).
  • D.-Q. Yu, T. C. Chai, M. L. Thew, Y. Y. Ong, V. S. Rao, L. C. Wai, and J. H. Lau, "Electromigration study of 50 ㎛ pitch micro solder bumps using four-point Kelvin structure", 2009 59th ECTC. IEEE, 930-935 (2009).
  • M. Gerber, C. Beddingfield, S. O'connor, M. Yoo, M. Lee, D. Kang, S. Park, C. Zwenger, R. Darveaux, R. Lanzone, K. Park, "Next generation fine pitch Cu Pillar technology-Enabling next generation silicon nodes", 2011 61st ECTC. IEEE, 612-618 (2011).
  • Z. Huang, R. E. Jones, and A. Jain, "Experimental investigation of electromigration failure in Cu-Sn-Cu micropads in 3D integrated circuits", Microelectron. Eng., 122, 46-51 (2014).
  • J. Li, Y. Zhang, Z. Haoliang, Z. Chen, C. Zhou, X. Liu, and W. Zhu, "The thermal cycling reliability of copper pillar solder bump in flip chip via thermal compression bonding", Microelectron. Reliab., 104, 113543 (2020).
  • Y. Orii, K. Toriyama, S. Kohara, H. Noma, K. Okamoto, D. Toyoshima, and K. Uenishi, "Micro Structure Obser Vation and Reliability Behavior of Peripheral Flip Chip Interconnections with Solder-Capped Cu Pillar Bumps", Trans. JIEP., 4(1), 73-86 (2011).
  • H. Xu, I. Qin, H. Clauberg, B. Chylak, and V. L. Acoff, "Behavior of palladium and its impact on intermetallic growth in palladium-coated Cu wire bonding", Acta Materialia, 61(1), 79-88 (2013).
  • B. Wu, S. Zhang, F. Wang, and Z. Chen, "Micro Copper Pillar Interconnection Using Thermosonic Flip Chip Bonding", J. Electron. Packag., 140(4), 044502 (2018).
  • Z. Li, M. Li, Y. Xiao, and C. Wang, "Ultrarapid formation of homogeneous Cu6Sn5 and Cu3Sn intermetallic compound joints at room temperature using ultrasonic waves", Ultrasonics Sonochemistry, 21(3), 924-929 (2014).
  • Y. Orii, K. Toriyama, H. Noma, Y. Oyama, H. Nishiwaki, M. Ishida, T. Nishio, N. C. LaBianca, C. Feger, "Ultrafine-pitch C2 flip chip interconnections with solder-capped Cu pillar bumps", 2009 59th ECTC. IEEE, 948-953 (2009).
  • D. Save, F. Braud, J. Torres, F. Binder, C. Muller, J. O. Weidner, and W. Hasse, "Electromigration Resistance of Copper Interconnects", Microelectron. Eng., 33(1-4), 75-84 (1997).
  • Y. J. Jang, and J. P. Jung, "Scallop-free TSV, Copper Pillar and Hybrid Bonding for 3D Packaging", J. Microelectron. Packag. Soc., 29(4), 1-8 (2022).
  • J. H. Kim, G. Y. Cheon, D. J. Kim, Y. B. Park, and Y. H. Ko, "A Study on Properties of Pb-free Solder Joints Combined Sn-Bi-Ag with Sn-Ag-Cu by Conditions of Reflow Soldering Processes", J. Microelectron. Packag. Soc., 29(3), 55-61 (2022).
  • X. Ji, L. Du, S. He, H. van Zeijl, and G. Zhang, "Microstructural and micromechanical characterization of sintered nanocopper bump for flip-chip heterogeneous integration", Microelectronics Reliability, 150, 115180 (2023).
  • J. Zurcher, L. Del Carro, G. Schlottig, D. N. Wright, A. S. B. Vardoy, M. M. V. Taklo, T. Mills, U. Zschenderlein, B. Wunderle, and T. Brunschwiler, "Sintering of copper nanoparticle pastes for microelectronic packaging", Diss. ETH Zurichpp, 343-349 (2016).
  • Y. Mou, L. Jiaxin, H. Cheng, Y. Peng, and M. Chen, "Facile Preparation of Self-Reducible Cu Nanoparticle Paste for Low Temperature Cu-Cu Bonding", JOM, 71(9), 3076-3083 (2019).
  • J.-J. Jhan, K. Wataya, H. Nishikawa, and C.-M. Chen, "Electrodeposition of nanocrystalline Cu for Cu-Cu direct bonding", J. Taiwan. Inst. Chem. Eng., 132, 104127 (2022).
  • X. Liu, and H. Nishikawa, "Low-pressure Cu-Cu bonding using in-situ surface-modified microscale Cu particles for power device packaging", Scr. Mater., 120, 80-84 (2016).
  • E. B. Choi, and J. H. Lee, "Tens-of-seconds solid-state sinter-bonding technique in air using in situ reduction of surface oxide layers on easily bendable dendritic Cu particles", Appl. Surf. Sci., 580, 152347 (2022).
  • E. B. Choi, Y. J. Lee, and J. H. Lee, "Rapid sintering by thermo-compression in air using a paste containing bimodal-sized silver-coated copper particles and effects of particle size and surface finish type", J. Alloys. Compd., 897, 163223 (2022).
  • Y. J. Lee, and J. H. Lee, "Ultrafast Sinter Bonding Between Cu Finishes Under Moderate Compression Using In Situ Derived Ag Formed via Low-Temperature Decomposition of Ag2O in the Bonding Paste", Met. Mater. Int., 29(6), 1775-1785 (2023).