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KCI Accredited Journals KCI 등재지
KCI Impact Factor 0.54
School of Chemical Engineering, Sungkyunkwan University, 585 Cheoncheon-dong, Jangan-gu, Suwon-si, Gyeonggi-do, 16419, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 1-6.
Spiders detect even tiny vibrations through their vibrational sensory organs. Leveraging their exceptional vibration sensing abilities, they can detect vibrations caused by prey or predators to plan attacks or perceive threats, utilizing them for survival. This paper introduces a nanoscale crack-based sensor mimicking the spider’s sensory organ. Inspired by the slit sensory organ used by spiders to detect vibrations, the sensor with the cracks detects vibrations and pressure with high sensitivity. By controlling the depth of these cracks, they developed a sensor capable of detecting external mechanical signals with remarkable sensitivity. This sensor achieves a gauge factor of 16,000 at 2% strain with an applied tensile stress of 10 N. With high signal-to-noise ratio, it accurately recognizes desired vibrations, as confirmed through various evaluations of external force and biological signals (speech pattern, heart rate, etc.). This underscores the potential of utilizing biomimetic technology for the development of new sensors and their application across diverse industrial fields.
Biomimetics, Mechanosensor, Crack sensor, Spider’s sensory organ, Vibration
Carbon & Light Materials Group, Korea Institute of Industrial Technology, Jeonju 54853, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 7-15.
In the trend of the multi-functionalization, miniaturization, and increased power output trends of flexible and stretchable electronic devices, the development of materials or structures with superior heat transfer characteristics has become a pressing issue. Traditional thermal interface materials (TIM) fail to meet the heat dissipation requirements of flexible and stretchable electronic devices, which must endure rapid bending, twisting, and stretching. To address this challenge, there is a demand for the development of TIM that simultaneously possesses high thermal conductivity and stretchability. This paper examines the research trends of liquid metal, carbon, and ceramic-based stretchable thermal interface materials and explores effective strategies for enhancing their thermal and mechanical properties.
Thermal interface materials, Flexible and stretchable electronic device, Thermal conductivity, Stretchability, Heat dissipation, Thermal management
1School of Chemical Engineering, Chonnam National University, Gwangju 61186, Korea, 2Department of Electrical Engineering, Chungnam National University 34134, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 16-22.
Along with the high interest in electric vehicles and new renewable energy, there is a growing demand to apply lithium-ion batteries in the construction equipment industry. The capacity of heavy construction equipment that performs various tasks at construction sites is rapidly decreasing. Therefore, it is essential to accurately predict the state of batteries such as SOC (State of Charge) and SOH (State of Health). In this paper, the errors between actual electrochemical measurement data and estimated data were compared using the Dual Extended Kalman Filter (DEKF) algorithm that can estimate SOC and SOH at the same time. The prediction of battery charge state was analyzed by measuring OCV at SOC 5% intervals under 0.2C-rate conditions after the battery cell was fully charged, and the degradation state of the battery was predicted after 50 cycles of aging tests under various C-rate (0.2, 0.3, 0.5, 1.0, 1.5C rate) conditions. It was confirmed that the SOC and SOH estimation errors using DEKF tended to increase as the C-rate increased. It was confirmed that the SOC estimation using DEKF showed less than 6% at 0.2, 0.5, and 1C-rate. In addition, it was confirmed that the SOH estimation results showed good performance within the maximum error of 1.0% and 1.3% at 0.2 and 0.3C-rate, respectively. Also, it was confirmed that the estimation error also increased from 1.5% to 2% as the C-rate increased from 0.5 to 1.5C-rate. However, this result shows that all SOH estimation results using DEKF were excellent within about 2%.
Lithium-ion battery, Construction equipment, Kalman filter, Equivalent circuit model, State of Health (SOH)
School of Materials Science & Engineering, Research Center for Energy and Clean Technology, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do 36729, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 23-28.
Electronic products utilizing flexible devices experience harsh mechanical deformations in real-use environments. As a result, researches on the mechanical reliability of these flexible devices have attracted considerable interest among researchers. This study employed previous bending strain models and finite element analysis to predict the maximum bending strain of metal films deposited on flexible substrates. Bending experiments were simulated using finite element analysis with variations in the material and thickness of the thin films, and the substrate thickness. The results were compared with the strains predicted by existing models. The distribution of strain on the surface of film was observed, and the error rate of the existing model was analyzed during bending. Additionally, a modified model was proposed, providing mathematical constants for each case.
Bending strain, FE analysis, Metal thin film, Flexible substrate
1School of Advanced Materials Engineering, Dong-Eui University, 176 Eomgwangro, Busan, 47340, Republic of Korea, 2School of Semiconductor & Electronic Engineering, Gachon University, 1342 Seongnam-daero, Sujeong-gu, Seongnam-si, Gyeonggi-do 13120, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 29-34.
The heating element utilizing the Joule heating generated when current flows through a conductor is widely researched and developed for various industrial applications such as moisture removal in automotive windshield, high-speed train windows, and solar panels. Recently, research utilizing heating elements with various nanostructures has been actively conducted to develop flexible heating elements capable of maintaining stable heating even under mechanical deformation conditions. In this study, flexible polyurethane possessing excellent flexibility was selected as the substrate, and silver (Ag) thin films with low electrical resistivity (1.6 μΩ-cm) were fabricated as the heating layer using magnetron sputtering. The 2D heating structure of the Ag thin films demonstrated excellent heating reproducibility, reaching 95% of the target temperature within 20 seconds. Furthermore, excellent heating characteristics were maintained even under mechanically deforming environments, exhibiting outstanding flexibility with less than a 3% increase in electrical resistance observed in repetitive bending tests (10,000 cycles, based on a curvature radius of 5 mm). This demonstrates that polyurethane/Ag planar heating structure bears promising potential as a flexible/wearable heating element for curved-shaped appliances and objects subjected to diverse stresses such as human body parts.
Joule heating, Planar heater, Magnetron sputtering, Sheet resistance
1Department of Advanced Materials Engineering, Chungbuk National University, Chungdae-ro, Seowon-gu, Cheongju, Chungbuk 28644, Korea, 2Welding and Joining R&D Group, Korea Institute of Industrial Technology (KITECH), 156 Gaetbeol-ro, Yeonsu-Gu, Incheon 21999, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 35-42.
Recently, with the miniaturization and high integration of semiconductor chips, the bump bridge phenomenon caused by fine pitches is drawing attention as a problem. Accordingly, Cu pillar bump, which can minimize the bump bridge phenomenon, is widely applied in the semiconductor package industry for fine pitch applications. When exposed to a high-temperature environment, the thickness of the intermetallic compound (IMC) formed at the joint interface increases, and at the same time, Kirkendall void is formed and grown inside some IMC/Cu and IMC interfaces. Therefore, it is important to control the excessive growth of IMC and the formation and growth of Kirkendall voids because they weaken the mechanical reliability of the joints. Therefore, in this study, isothermal aging evaluation of Cu pillar bump joints with a CS (Cu+ Sn-1.8Ag Solder) structure was performed and the corresponding results was reported.
Cu pillar bump, Intermetallic compound, Kirkendall void, Aging, Reflow soldering
1Department of Materials Science and Engineering Hongik University, Sejong 30016 Republic of Korea, 2Department of Energy Systems Research, Ajou University, Suwon 16499 Republic of Korea, 3Department of Physics, Inha University, Incheon 22212 Republic of Korea, 4Department of Physics, Ajou University, Suwon 16499 Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 43-48.
: The discovery of a two-dimensional electron gas (2DEG) at the interface of LaAlO3 (LAO) and SrTiO3 (STO) substrates has sparked significant interest, providing a foundation for cutting-edge research in electronic devices based on complex oxide heterostructures. However, conventional methods for producing LAO thin films, typically employing techniques like pulsed laser deposition (PLD) within physical vapor deposition (PVD), are associated with high costs and challenges in precisely controlling the La and Al composition within LAO. In this study, we adopted a cost-effective alternative approach—solution-based processing—to fabricate LAO thin films and investigated their electrical properties. By adjusting the concentration of the precursor solution, we varied the thickness of LAO films from 2 to 65 nm and determined the sheet resistance and carrier density for each thickness. After vacuum annealing, the sheet resistance of the conductive channel ranged from 0.015 to 0.020 Ω·sq⁻¹, indicating that electron conduction occurs not only at the LAO/STO interface but also into the STO bulk region, consistent with previous studies. These findings demonstrate the successful formation and control of 2DEG through solution-based processing, offering the potential to reduce process costs and broaden the scope of applications in electronic device manufacturing.
Complex oxide thin films, SrTiO3, LaAlO3, Two-dimensional electron gas, Solution-based process
1 OxWires Co., Ltd., Pyeongtaek City, Korea, 2 NCD Co., Ltd., Daejeon City, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 1-8.
Bonding wires are composed of conductive metals of Au, Ag & Cu with excellent electrical conductivities for transmitting power and signals to wafer chips. Wire metals do not provide electrical insulation, adhesion promoter and corrosion passivation. Adhesion between metal wires is extremely weak, which is responsible for wire cut failures during thermal cycling. Organic coating for electrical insulation does not satisfy bondability and manufacturability, and it is complex to apply very thin organic coating on metal wires. Automotive packages require enhanced reliability of packages under harsh conditions. LED and power packages are susceptible to wire cut failures. Contrary to conventional OCB behaviors, forming gas was not required for free air ball formation for both Ag and Pd-coated Cu wires with Al2O3 passivation.
Insulated wire, Adhesively-promoted wire, Passivated wire, Al2O3 coating, Bonding wire, Nano ceramic
1 School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do 36729, Korea, 2 Amkor Technology Korea Inc., 150, Songdomirae-ro, Yeonsu-gu, Incheon 21991, Korea, 3 STATS ChipPAC Korea Ltd, 191, Jayumuyeok-ro, Jung-gu, Incheon 22379, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 9-15.
The effect of the residual impurity on the prepreg surface on the wettability of encapsulant for chip on board package was analyzed with microstructure, compositions and chemical bonds using a scanning electron microscope and X-ray photoelectron spectroscopy. As a result, the contact angle of w/ residual impurity sample was measured to be 28° higher than that of w/o residual impurity sample, and the C-O bond was decreased to be 4% lower than that of w/o residual impurity sample. The surface energy of the prepreg decreased because the impurity ions, Na and F, generated by the manufacturing process and wet etching, reacted chemically with the C on the prepreg surface, forming C-F bonds and breaking the C-O bonds on the prepreg surface. Therefore, the wettability of the encapsulant was degraded because the contact angle between the encapsulant and the prepreg was increased.
Prepreg, Encapsulant, Surface energy, Wettability, Contact angle
HANA Micron Ins., 77, Yeonamyulgeum-ro, Eumbong-myeon, Asan-si, Chungcheongnam-do, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 16-22.
With advances of artificial intelligence (AI) technology, the demand is increasing for high-end semiconductors in various places such as data centers. In order to improve the performance of semiconductors, reducing the pitch of patterns and increasing density of I/Os are required. For this issue, 2.5dimension(D) packaging is gaining attention as a promising solution. The core technologies used in 2.5D packaging include microbump, interposer, and bridge die. These technologies enable the implementation of a larger number of I/Os than conventional methods, enabling a large amount of information to be transmitted and received simultaneously. This paper proposes the Molded Bridge die on Substrate (MBoS) process technology, which combines molding and Redistribution Layer (RDL) processes. The proposed MBoS technology is expected to contribute to the popularization of next-generation packaging technology due to its easy adaption and wide application areas.
Molding, 2.5D Packaging, Bridge Die, Interposer
1 Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 291, Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea, 2 Samsung Electronics Co. Ltd., 1, Samsungjeonja-ro, Hwaseong-si, Gyeonggi-do 18448, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 23-27.
In this study, the time-dependent warpage behavior caused by the viscoelastic properties of prepreg in a printed circuit board (PCB) was analyzed by finite element method (FEM). The accurate viscoelastic properties of the prepreg were measured by stress relaxation test, which were then incorporated into constructed warpage analysis model. When the PCB was subjected to repeated thermal cycles, the warpage of the PCB was restored to its initial state when only the elastic properties of the prepreg were considered, but when the viscoelastic properties were also considered, the warpage was not restored and permanent warpage change occurred. The warpage analysis for three different types of prepreg was conducted to compare their mechanical reliability, and the results showed that materials with elastic properties dominating over viscoelastic properties experienced less warpage, resulting in better mechanical reliability.
Printed circuit board (PCB), Warpage, Prepreg, Finite element method (FEM), Viscoelastic property
Department of Mechanical Engineering, The University of Suwon, Hwaseong 18323, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 28-35.
Corrosion inside electronic packages significantly impacts the system performance and reliability, necessitating non-destructive diagnostic techniques for system health management. This study aims to present a non-destructive method for assessing corrosion in copper interconnects using the Smith chart, a tool that integrates the magnitude and phase of complex impedance for visualization. For the experiment, specimens simulating copper transmission lines were subjected to temperature and humidity cycles according to the MIL-STD-810G standard to induce corrosion. The corrosion level of the specimen was quantitatively assessed and labeled based on color changes in the R channel. S-parameters and Smith charts with progressing corrosion stages showed unique patterns corresponding to five levels of corrosion, confirming the effectiveness of the Smith chart as a tool for corrosion assessment. Furthermore, by employing data augmentation, 4,444 Smith charts representing various corrosion levels were obtained, and artificial intelligence models were trained to output the corrosion stages of copper interconnects based on the input Smith charts. Among image classification-specialized CNN and Transformer models, the ConvNeXt model achieved the highest diagnostic performance with an accuracy of 89.4%. When diagnosing the corrosion using the Smith chart, it is possible to perform a non-destructive evaluation using electronic signals. Additionally, by integrating and visualizing signal magnitude and phase information, it is expected to perform an intuitive and noise-robust diagnosis.
Artificial intelligence, Cu interconnects, Corrosion, Non-destructive evaluation, Smith chart
Department of Materials Science and Engineering, Dong-A University, Busan 49315, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 36-44.
Copper electrodeposition technology is essential for producing copper films and interconnects in the microelectronics industries including semiconductor packaging, semiconductors and secondary battery, and there are extensive efforts to control the microstructure of these films and interconnects. In this study, we investigated the influence of crystallographic orientation on the local plastic deformation of copper films for secondary batteries deformed by uniaxial tensile load. Crystallographic orientation maps of two electrodeposited copper films with different textures were measured using an electron backscatter diffraction (EBSD) system and then used as initial conditions for crystal plasticity finite element analysis to predict the local plastic deformation behavior within the films during uniaxial tension deformation. Through these processes, the changes of the local plastic deformation behavior and texture of the films were traced according to the tensile strain, and the crystal orientations leading to the inhomogeneous plastic deformation were identified.
Electrodeposited copper film, Crystallographic orientation, Plastic deformation, Electron backscatter diffraction (EBSD), Crystal plasticity finite element method
1 Department of IT Semiconductor Engineering, Tech University of Korea, 2 Department of Mechatronics Engineering, Tech University of Korea, 237, Sangidaehak-ro, Siheung, Gyeonggi, 15037, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 45-53.
The maintenance of semiconductor equipment is crucial for the continuous growth of the semiconductor market. System management is imperative given the anticipated increase in the capacity and complexity of industrial equipment. Ensuring optimal operation of manufacturing processes is essential to maintaining a steady supply of numerous parts. Particularly, monitoring the status of substrate transfer robots, which play a central role in these processes, is crucial. Diagnosing failures of their major components is vital for preventive maintenance. Fault diagnosis methods can be broadly categorized into physics-based and data-driven approaches. This study focuses on data-driven fault diagnosis methods due to the limitations of physics-based approaches. We propose a methodology for data acquisition and preprocessing for robot fault diagnosis. Data is gathered from vibration sensors, and the data preprocessing method is applied to the vibration signals. Subsequently, the dataset is trained using Gradient Tree-based XGBoost machine learning classification algorithms. The effectiveness of the proposed model is validated through performance evaluation metrics, including accuracy, F1 score, and confusion matrix. The XGBoost classifiers achieve an accuracy of approximately 92.76% and an equivalent F1 score. ROC curves indicate exceptional performance in class discrimination, with 100% discrimination for the normal class and 98% discrimination for abnormal classes.
Transfer robot, Fault diagnosis, Vibration sensor, Data preprocessing, Machine learning
Department of Materials Science and Engineering, Dong-A University, Saha-Gu, Busan, 49315, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 54-62.
SICM (Scanning Ion Conductivity Microscopy) is a technique for measuring surface topography in an environment where electrochemical reactions occur, by detecting changes in ion conductivity as a nanopipette tip approaches the sample. This study includes an investigation of the current response curve, known as the approach curve, according to the distance between the tip and the sample. First, a simulation analysis was conducted on the approach curves. Based on the simulation results, then, several measuring experiments were conducted concurrently to analyze the difference between the simulated and measured approach curves. The simulation analysis confirms that the current squeezing effect occurs as the distance between the tip and the sample approaches half the inner radius of the tip. However, through the calculations, the decrease in current density due to the simple reduction in ion channels was found to be much smaller compared to the current squeezing effect measured through actual experiments. This suggests that ion conductivity in nano-scale narrow channels does not simply follow the Nernst-Einstein relationship based on the diffusion coefficients, but also takes into account the fluidic hydrodynamic resistance at the interface created by the tip and the sample. It is expected that SICM can be combined with SECM (Scanning Electrochemical Microscopy) to overcome the limitations of SECM through consecutive measurement of the two techniques, thereby to strengthen the analysis of electrochemical surface reactivity. This could potentially provide groundbreaking help in understanding the local catalytic reactions in electroless plating and the behaviors of organic additives in electroplating for various kinds of patterns used in semiconductor damascene processes and packaging processes.
SICM, Microscopy, UME, Electrochemistry, Electrode
1 Department of Mechanical Engineering, Chonnam National University, Gwangju, Republic of Korea, 2 Korea Institute of Machinery & Materials, 3 Department of Industrial & System Engineering, Texas A&M University, College Station, TX, United States
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 63-68.
With the increasing use of transparent displays and flexible devices, polymer substrates offering excellent flexibility and strength are in demand. Since polymers are sensitive to heat, precise temperature control during the process is necessary. The study proposes a temperature measurement system for the laser processing area within the polymer base, aiming to address the drawbacks of using these polymer bases in laser-based selective processing technology. It presents the possibility of optimizing the process conditions of the polymer substrate through local temperature change measurements in the laser processing area. We developed and implemented the PDPT (Photodiode-based Planck Thermometry) to measure temperature in the laser-processing area. PDPT is a non-destructive, contact-free system capable of real-time measurement of local temperature increases. We monitored the temperature fluctuations during the laser processing of the polymer substrate. The study shows that the proposed laser-based temperature measurement technology can measure real-time temperature during laser processing, facilitating optimal production conditions. Furthermore, we anticipate the application of this technology in various laser-based processes, including essential micro-laser processing and 3D printing.
Photodiode-based Planck Thermometry (PDPT), Laser-based packaging processes, Real-time temperature monitoring, High-resolution temperature measurement
1 Robot Intelligent Control System Engineering, Graduate School of Convergence Technology and Energy, Tech University of Korea, 237, Sangidaehak-ro, Siheung-si, Gyeonggi-do 15073, Korea, 2 R&D Center, BS Technics, 97-5, Sandan-ro,163beon-gil, Danwon-gu, Ansan-si, Gyeonggi-do 15429, Korea, 3 Micro-Joining Center, Korea Institute of Industrial Technology, 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 69-77.
Due to the miniaturization and multifunctionality of electronic devices, a surface mount technology in the
form of molded interconnect devices (MID), which directly forms electrodes and circuits on the plastic injection parts
and mounts components and parts on them, is being introduced to overcome the limitations in the mounting area of
electronic components. However, when using plastic injection parts with low thermal stability, there are difficulties in
mounting components through the conventional reflow process.
In this study, we developed a process that utilizes induction heating, which can selectively heat specific areas or materials,
to melt solder and mount components without causing any thermal damage to the plastic. We designed the shape of an
induction heating Cu coil that can concentrate the magnetic flux on the area to be heated, and verified the concentration
of the magnetic flux and the degree of heating on the pad part through finite element method (FEM).
LEDs, capacitors, resistors, and connectors were mounted on a polycarbonate substrate using induction heating to verify
the mounting process, and their functionality was confirmed. We presented the applicability of a selective heating process
through magnetic induction that can overcome the limitations of the reflow method.
low heat resistant material, Induction heating soldering, electronic component mounting, MID, Induction Heating Selective Bonding
School of Chemical Engineering, Chonnam National University, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 78-84.
The electrochemical reduction of carbon dioxide (CO2) is gaining attention as an effective method for converting CO2 into high-value carbon compounds. This paper reports a facile meth od for synth esizing and characterizing g-C3N4- modified porous Au (pAu) electrodes for electrochemical CO2 reduction using e-beam deposition and anodization techniques. The fabricated pAu@g-C3N4 electrode (@ -0.9 VRHE) demonstrated superior electrochemical performance compared to the pAu electrode. Both electrodes exhibited a Faradaic efficiency (FE) of 100% for CO production. The pAu@g-C3N4 electrode achieved a maximum CO production rate of 9.94 mg/s, which is up to 2.2 times higher than that of the pAu electrode. This study provides an economical and sustainable approach to addressing climate change caused by CO2 emissions and significantly contributes to the development of electrodes for electrochemical CO2 reduction.
Electrochemical (EC), CO2 reduction (CO2RR), Carbon monoxide (CO), graphitic carbon nitride (g-C3N4), Au catalyst, porous structure
1 Department of Chemical Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea, 2 Optoelectronics Convergence Research Center, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea, 3 Energy Convergence Core-Facility, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea, 4 UJL Inc. Advanced Institutes of Convergence Technology A1513, Kwangkyo-ro 145, Yeongtong-gu, Suwon-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 85-91.
In this study, we investigated a method of growing single crystal β-Ga2O3 thin films on a c-plane sapphire substrate using MOCVD. We confirmed the optimal growth conditions to increase the crystallinity of the β-Ga2O3 thin film and confirmed the effect of the ratio between O2 and Ga precursors on crystal growth on the crystallinity of the thin film. The growth temperature range was 600~1100℃, and crystallinity was analyzed when the O2/TMGa ratio was 800~6000. As a result, the highest crystallinity thin film was obtained when the molar ratio between precursors was 2400 at 1100°C. The surface of the thin film was observed with a FE-SEM and XRD ω-scan of the thin film, the FWHM was found to be 1.17° and 1.43° at the (201) and (402) diffraction peaks. The optical band gap energy obtained was 4.78 ~ 4.88 eV, and the films showed a transmittance of over 80% in the near-ultraviolet and visible light regions.
β-Ga2O3, MOCVD, Heteroepitaxy, Temperature, Single crystal
Department of Semiconductor Engineering, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul, 01811, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 1-9.
This paper addresses the significance of Cu/Polymer Hybrid Bonding technology in the advancement of semiconductor packaging. As the demands of the AI era increase, the semiconductor industry is exploring heterogeneous integration packaging technologies to achieve high I/O counts, low power consumption, efficient heat dissipation, multifunctionality, and miniaturization. The conventional Cu/SiO2 Hybrid Bonding structure faces limitations such as achieving compatibility with CMP processes to attain surface roughness below 1nm and the occurrence of bonding defects due to particles. However, Cu/Polymer Hybrid Bonding technology, utilizing polymers, is gaining attention as a promising alternative to overcome these challenges. This study focuses on the deposition, patterning, and material properties of polymers essential for Cu/Polymer Hybrid Bonding, highlighting the advantages and potential applications of this technology compared to existing methods. Specifically, the use of polymers with low glass transition temperatures (Tg) is discussed for their benefits in low-temperature bonding processes and improved mechanical properties due to their high coefficients of thermal expansion. Furthermore, the study explores surface property modifications of polymers and the enhancement of bonding mechanisms through plasma treatment. This research emphasizes that Cu/Polymer Hybrid Bonding technology can serve as a critical breakthrough in developing high-performance, low-power semiconductor devices within the industry.
3D IC Package, Hybrid Bonding, Polymer Dielectric, Cu/Polymer Hybrid Bonding
1 Department of Electronic Engineering, Hanyang University, Seoul, Republic of Korea, 2 STECO, Cheonan, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 10-17.
This paper discusses Chip On Film (COF) technology, one of the key technologies in flexible packaging to enable miniaturization and flexibility of electronic devices. COF attaches Display Driver IC (DDI) directly to a flexible polyimide substrate, enabling lightweight and reduced thickness for high-resolution displays. COF technology is primarily used in high-performance display panels, such as organic light emitting diode (OLED) displays, and plays a key role in portable electronic devices, such as smartphones and wearable devices. This study analyzes the key components of COF and advances in bonding technology. In particular, the introduction of modern bonding techniques, such as thermocompression bonding and thermo-sonic bonding, has led to significant improvements in bonding reliability and electrical performance. These bonding techniques enhance the mechanical stability of COF packages while maintaining high electrical connectivity in fine-pitch structures. This paper will discuss the future development of COF bonding technology and its challenges and explore its potential as a next-generation display and advanced packaging technology.
Chip On Film, Flexible Package, Thermo-compression bonding, Anisotropic conductive, Non-conductive
Department of Materials Science and Engineering, Pukyong National University, 45, Yongso-ro, Busan, 48513, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 18-23.
Nanoimprint lithography (NIL) is widely used to form structures ranging from micro to nanoscale due to its advantage of generating high-resolution patterns at a low process cost. However, most NIL processes require the use of imprint resists and external elements such as ultraviolet light or heat, necessitating additional post-processes like etching or metal deposition to pattern the target material. Furthermore, patterning on flexible and/or non-planar films presents significant challenges. This study introduces an extreme pressure imprint lithography (EPIL) process that can form micro- /nano-scale patterns on the surface of a flexible rubber magnet composite (RMC) film at room temperature without an etching process. The EPIL technique can form ultrafine structures over large areas through the plastic deformation of various materials, including metals, polymers, and ceramics. In this study, we demonstrate the process and outcomes of creating a variety of periodic structures with diverse pattern sizes and shapes on the surface of a flexible RMC composed of strontium ferrite and chlorinated polyethylene. The EPIL process, which allows for the precise patterning on the surface of RMC materials, is expected to find broad applications in the production of advanced electromagnetic device components that require fine control and changes in magnetic orientation.
Imprint lithography, Rubber magnetic composition, Nanostructure, Nanopatterning
1 School of Mechanical Engineering, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea, 2 Department of Smart Fab. Technology, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea, 3 Department of Intelligent Robotics, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 24-37.
Due to the thin nature of semiconductor packages, even minor thermal loads can cause significant warpage, impacting product reliability through issues like delamination or cracking. The mold curing process, which encloses the package to protect the semiconductor chip, is particularly challenging to predict due to the complex thermal, chemical, and mechanical interactions. This study proposes a cost-effective machine learning model to predict warpage in the mold curing process. We developed methods to characterize the curing degree based on time and temperature and quantify the material's mechanical properties accordingly. A Finite Element Method (FEM) simulation model was created by integrating these properties into ABAQUS UMAT to predict warpage for various design factors. Additionally, a Warpage formula was developed to estimate local warpage based on the package's stacking structure. This formula combines bending theory with thermo-chemical-mechanical properties and was validated through FEM simulation results. The study presents a method to construct a machine learning model for warpage prediction using this formula and proposes a cost-effective approach for building a training dataset by analyzing input variables and design factors. This methodology achieves over 98% prediction accuracy and reduces simulation time by 96.5%.
Warpage, Curing process, FEM simulation, Cost-effective, Physics informed machine Learning
Seoul National University of Science and Technology, 232 Gongneung-ro, Nowon-gu, Seoul 01811
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 38-41.
In semiconductor manufacturing, the alignment process is fundamental to all manufacturing steps, and alignment errors are inevitably introduced. These alignment errors can lead to issues such as increased resistance, signal delay, and degradation. This study systematically analyzes the changes in the electrical characteristics of the bonding interface when alignment errors occur in metal interconnect and bonding structures. The results show that current density tends to concentrate at the edges of the bonding interface, with the middle part of the interface being particularly vulnerable. As alignment errors increase, the current path redistributes, causing previously concentrated current areas to disappear and an effect similar to an increase in contact area, resulting in a decrease in resistance in certain vulnerable parts. These findings suggest that proposing structural improvements to eliminate the vulnerable parts of the bonding interface could lead to interconnect with significantly improved resistance performance compared to existing structure. This study clarifies the impact of alignment errors on electrical characteristics, which is expected to play a crucial role in optimizing the electrical performance of semiconductor devices and enhancing the efficiency of the manufacturing process.
Bonding, Current density, Bonding interface, Contact resistance, Misalignment, Metal interconnects
1 ICT device Packaging Research Center, Korea Electronics Technology Institute (KETI), 25, Saenari-ro, Bundang-gu, Seongnam-si, Gyeonggi-do 13509, Republic of Korea, 2 Department of Semiconductor Engineering, Seoul National University of Science and Technology, Gongneung-ro 232, Nowon-gu, Seoul 01811, Republic of Korea, 3 Department of Nanotechnology Engineering, Pukyong National University, Busan 48513, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 42-49.
In the electromagnetic wave shielding material market, superior shielding performance in the high-frequency range, along with flexibility and durability, has emerged as critical requirements. The need for high-performance EMI (Electromagnetic Interference) films to address electromagnetic wave interference issues is growing, particularly in various industrial sectors such as smart electronic devices, automotive electronic systems, and communication equipment. In this study, a trimodal silver paste was developed and fabricated into an EMI film, with its performance evaluated. The developed silver paste, utilizing a modified epoxy binder, exhibited properties suitable for screen printing processes. The film demonstrated excellent shielding performance, with an average attenuation of -99 dB in the high-frequency range of the 5G spectrum (26.5 GHz to 40 GHz), and a shielding effectiveness of -90.3 dB at 33.6 GHz. Flexibility and durability tests showed that the film maintained its flexibility even at a curvature radius of 1 mm. In the bending cycle test, the resistance increased by approximately 25.5% from 0.51 Ω to 0.64 Ω after 10,000 cycles in the outer bending scenario, while in the inner bending scenario, the resistance decreased by about 3.6%, indicating reduced resistance to compressive stress.
Electromagnetic interference shielding, Trimodal silver paste, Flexible shielding film, High frequency
Departement of Industrial Engineering, Sungkyunkwan University, 2066, Seobu-ro, Suwon-si, Gyeonggi-do, 16419, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 50-57.
Recently, applying a machine learning to surrogate modeling for rapid optimization of complex designs have been widely researched. Once trained, the machine learning surrogate model can predict similar outputs to Finite Element Analysis (FEA) simulations but require significantly less computing resources. In addition, combined with optimization methodologies, it can identify optimal design variable with less time requirement compared to iterative simulation. This study proposes a Deep Neural Network (DNN) model with Bayesian Optimization (BO) approach for efficiently searching the optimal design variables to minimize the warpage of electronic package. The DNN model was trained by using design variable-warpage dataset from FEA simulation, and the Bayesian optimization was applied to find the optimal design variables which minimizing the warpage. The suggested DNN + BO model shows over 99% consistency compared to actual simulation results, while only require 15 second to identify optimal design variable, which reducing the optimization time by more than 57% compared to FEA simulation.
Deep Neural Network, Bayesian Optimization, Electronics package, Finite Element Analysis
Seoul National University of Science and Technology, 232 Gongneung-ro, Nowon-gu, Seoul 01811, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 58-61.
In a semiconductor system, the operation of sensors plays a crucial role in recognizing information, serving as the starting point for processing external information. This study evaluates the applicability of semiconductor systems by analyzing the operational characteristics of ultraviolet (UV) detection devices using gallium oxide. Gallium oxide exhibits a property where its resistance changes in response to UV light, making it feasible to implement detection devices utilizing this material. However, to determine its applicability in semiconductor systems, detailed studies on its operational characteristics are necessary. In this study, by varying the size of the electrodes, we assessed whether the formation of current paths in gallium oxide in response to UV light is localized. Additionally, we confirmed the response speed to UV light, comparable to commercially available products, through electrical measurements. Through this, we verified the commercial applicability of gallium oxide and its potential integration into various semiconductor systems.
Sensor device, Device engineering, Electrical analysis, UV detector
Department of Electric Engineering, Pukyong National University, 45 Yongso-Ro, Busan 48513, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 62-66.
A statistical approach to inspection of the 3-D shape of micro solder balls is proposed, where an optical method with spatially arranged LED and specular reflection is used. The reflected image captured by a vision system was analyzed to calculate the relative displacements of LED’s in the image. Also, the statistics of displacements for the micro solder balls contained in a captured image are used to detect existing defects, and the usefulness of the proposed method is shown via experiments.
Micro solder ball, 3-D shape inspection, Machine vision
Smart Electronics Research Center, Korea Electronics Technology Institute 111, Ballyong-ro, Deokjin-gu, Jeonju-si, Jeollabuk-do 54853, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 67-71.
A smart window based on a retarder can transmit or block polarized lights by overlapping two smart windows. In the study, tests were conducted to evaluate the performance of blocking solar heat using smart windows with a size of 300×300 ㎟. Solar heat gain coefficient (SHGC) values were derived through simulation using transmission and reflectance data of the smart windows. As a result of the simulation, it showed that SGHC is effective in blocking solar heat by obtaining values of 0.722 and 0.615 in transmission and blocking mode of smart windows, respectively. The test boxes were fabricated in order to verify the effect of suppressing temperature rise when applying smart windows, the inside temperature in test boxes, which are installed bare glass (reference) and two smart windows with transmission and blocking mode, were measured at 10 minutes-interval for 7 days. As of 1 p.m., the inside temperature of the test boxes with the smart windows applied showed lower temperature compared to the reference. In particular, on the day when the temperature of reference box was the highest at 66.1℃, the temperature of the test box with the smart window applied showed 61.0℃, which was lowered by 5.1℃.
Smart window, Phase retardation, Retarder, Solar heat, Transmittance-variable
HANA Micron Ins., 77, Yeonamyulgeum-ro, Eumbong-myeon, Asan-si, Chungcheongnam-do, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 72-79.
To realize high speed and high bandwidth in the 2.xD package structure, methods requiring high technology are being studied for processes such as interposer or bridge die bonding, as well as heterogeneous chip bonding. Particularly, the grinding process of bonding surfaces is considered a key technology. The method of bonding an interposer or bridge die including Cu layers to a substrate and then exposing metallic materials such as Cu, which can be electrically connected, through a grinding process to connect heterogeneous chips is an approach that utilizes conventional packaging techniques. However, to meet the yield and quality standards required for mass production in processes involving the largescale bonding of micro-bumps, as seen in 2.xD packages, it is essential to develop techniques based on high precision. This paper investigates the multi-material grinding process for heterogeneous chip bonding in a 2.xD package structure, using the grit size of the grinding wheel as a variable. The study examines the surface patterns and bonding characteristics of the exposed materials achieved through the grinding process. Through this study, we aim to optimize the grinding process for high-quality bonding, thereby contributing to the development of advanced packaging technologies.
2.xD packaging, Package grinding, Surface patterns, Bonding characteristics
1 Department of Materials Science and Engineering, Yonsei University, 50, Yonsei-ro, Seodaemun-gu, Seoul, South Korea, 03722, 2 Agency for Defense Development, Yuseong P.O. Box 35, Daejeon, South Korea, 34186, 3 Aerogel Materials Research Center, 50, Yonsei-ro, Seodaemun-gu, Seoul, South Korea, 03722
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 80-86.
Polyimide has advantages that are different with other polymers, such as high thermal stability, heat resistance, and high chemical resistance. Various application methods for Polyimide have been studied. In this study, research was conducted to manufacture Polyimide films. While implementing Polyimide films with excellent adhesion and pencil hardness through optimized manufacturing conditions, the applicability as a packaging material was considered by adding glass flakes to reduce oxygen permeability. As a result, Polyimide films with glass flakes and (3-Aminopropyl)triethoxysilane have a thickness of about 50 μm were uniformly implemented, and it was confirmed that the adhesion of Polyimide films was 4B, pencil hardness was 5H, and oxygen permeability was below 8.795 × 10-9 cc/s, respectively.
Polyimide, Glass flake, (3-Aminopropyl)triethoxysilane, Oxygen permeability, Pencil hardness, Adhesion
Department of Chemical and Biomolecular Engineering, Seoul National University of Science and Technology, Seoul, 01811, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 87-90.
Currently, when oxides are used as insulators in hybrid bonding for 3D integration, they are prone to delamination due to their surface characteristics, and the RC delay value due to the resistance of the metal and the capacitance of the insulator increases as the wiring of the semiconductor chip becomes longer. To solve these problems, we studied the optimization of the conditions of the polymer insulator bonding method for hybrid bonding. To check the possibility of the de-wetting method, we coated a polymer film on the existing micro pillar and conducted hot-press bonding to remove the polymer between the metals. Through this study, it is expected that the introduction of polymers as insulators in hybrid bonding and fine-pitch metal bonding will improve signal transmission speed by reducing RC delay. It is also expected to be commercialized in the future to increase the number of I/O terminals by applying it to hybrid bonding.
3D integration, Hybrid bonding, Polymer dielectric, Passivation layer
1 Advanced Packaging Integration Center , Korea Institute of Industrial Technology (KITECH), Incheon, Republic of Korea, 2 School of Electrical Engineering, Graduate School, Korea University, Seoul, Republic of Korea, 3 School of Materials Science and Engineering, Andong National University, Andong, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 91-98.
This study reveals the feasibility and effectiveness of sinter bonding using an Ag nano-porous sheet at the lowest “theoretically” possible temperature of 145 °C. By uniform pressure of 10 MPa for bonding times of 5 min and 10 min at 145 and 175 °C, we achieved bonding strengths exceeding approximately 20 MPa with a only 5 min of bonding time at 145 °C. In particular, it is interesting to note that in the pressure sintering bonding process at 145 °C, bonding times of 5 and 10 min had no significant difference in strength. Even with a bonding temperature of 175 °C, the difference in average bonding strength between bonding times of 5 min (i.e., 37.6 MPa) and 10 min (i.e., 43.0 MPa) was only 5 MPa. The bonding strength was fundamentally attributed to the thickness of the Ag sintered neck in the Ag sintered layer. Microstructural analysis revealed that as the bonding temperature increased to 175 °C, the fraction of CSL Σ3 boundaries within the Ag sintered layer increased, indicating greater coalescence of Ag particles. This study systematically investigated the mechanism of bonding strength in extremely low-temperature pressure Ag sinter bonding, considering the relationship between microstructures and mechanical behaviors.
Ag nano-porous sheet, Sheet bonding, Power module, Pressure bonding process, Mechanical strength
1 Department of Electrical and Computer Engineering, Seoul National University, 1 Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 2 Department of Automotive Engineering, Hanyang University, 222, Wangsimni-ro, Seongdong-gu, Seoul 04763, Korea
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 99-104.
With the advancement of power electronics technology and the increasing demand for high-efficiency power semiconductors, silicon carbide (SiC) devices have gained attention as an alternative to overcome the limitations of traditional silicon (Si) semiconductors. SiC devices enable excellent switching efficiency due to their high switching speed. However, parasitic inductance within the power module can cause voltage oscillations and overshoot phenomena, potentially leading to issues with electrical reliability and efficiency. To address these challenges, two approaches were proposed and validated. The first approach involved applying an RC snubber circuit to mitigate the effects of parasitic inductance, thereby improving electrical stability. The second approach focused on optimizing the lead-frame design to reduce parasitic inductance. Both methods were verified through simulations and experiments, demonstrating that the electrical reliability and efficiency of SiC power modules can be simultaneously improved.
Parasitic inductance, RC snubber, Double pulse test (DPT), Voltage overshoot, Switch loss, Silicon carbide (SiC)
Journal of the Microelectronics and Packaging Society, Vol. 31, No. , pp. 105-105.
Advanced Joining & Additive Manufacturing R&D Department / Micro-Joining Center, Korea Institute of Industrial Technology (KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 1-16.
Recently, the shift to next-generation wide-bandgap (WBG) power semiconductor for electric vehicle is accelerated due to the need to improve power conversion efficiency and to overcome the limitation of conventional Si power semiconductor. With the adoption of WBG semiconductor, it is also required that the packaging materials for power modules have high temperature durability. As an alternative to conventional high-temperature Pb-based solder, Ag sintering die attach, which is one of the power module packaging process, is receiving attention. In this study, we will introduce the recent research trends on the Ag sintering die attach process. The effects of sintering parameters on the bonding properties and methodology on the exact physical properties of Ag sintered layer by the realization 3D image are discussed. In addition, trends in thermal shock and power cycle reliability test results for power module are discussed.
Wide-bandgap, Power module, Ag sinter, Process parameter, Reliability
1Department of Mechanical Convergence Engineering, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea, 2Institute of Nanoscience and Technology, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 17-29.
In this paper, a method for evaluating the reliability of solder joints is introduced, as they play a crucial role in packaging technology due to the miniaturization and high-performance requirements of electronic device. Firstly, properties of solder based on various alloy compositions and solder types are described, followed by an analysis of solder joint structures in different packages. Next, the influence of solder alloy composition and microstructure on the thermal and mechanical properties of solder is analyzed, and solder creep behavior is briefly introduced. Subsequently, analytical techniques considering creep models and fatigue models for reliability evaluation are presented, and various ways to improve the reliability of solder joints are discussed. This study is expected to provide valuable information for evaluating and enhancing the reliability of solder joints in the semiconductor packaging technology field.
Package, Solder joint reliability, Creep model, Fatigue model, Microstructure
1 School of Industrial and Mechanical Engineering, The University of Suwon, 2 Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 30-41.
With the aggressive down-scaling of advanced integrated circuits (ICs), electronic packages have become the bottleneck of both reliability and performance of whole electronic systems. In order to resolve the reliability issues, Institute of Electrical and Electronics Engineers (IEEE) laid down a roadmap on fault detection and diagnosis (FDD), thrusting the digital twin: a combination of reliability physics and artificial intelligence (AI). In this paper, we especially review research works regarding the signal-based FDD approaches on the electronic packages. We also discuss the research trend of FDD utilizing AI techniques.
Artificial Intelligence, Reliability Physics, Electronic Packaging, Fault Detection and Diagnosis
1 Dept. of Advanced Materials Eng., Tech University of Korea, 237. Sangidaehak-ro, Siheung-si, Gyeonggi-do, Korea, 2Dept. of Electronics Eng., Tech University of Korea, 237. Sangidaehak-ro, Siheung-si, Gyeonggi-do, Korea, 3 JESAGI HANKOOK LTD., 17, MTV 25-ro58beon-gil, Siheung-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 42-48.
Recently, there has been an increasing demand for performance improvement and miniaturization in response to the growing variety of signals and power demands in many industries such as mobile, IoT, and automotive. As a result, there is a high demand for high-performance chips and advanced packaging technologies that can package such chips. In this context, the FOWLP process technology is a suitable technology, and this paper discusses the plasma application technologies that are being used and studied to improve the shortcomings of this process. The paper is divided into four parts, with an introduction and case studies for each of the plasma application technologies used in each part.
FOWLP(Fan-out wafer level packaging), Plasma, Packaging, PCB(Printed Circuit Board)
1 Department of Material Engineering, Tech University of Korea, 237. Sangidaehak-ro, Siheung-si, Gyeonggi-do, Korea, 2 Dept. of Electronics Eng., Tech University of Korea, 237. Sangidaehak-ro, Siheung-si, Gyeonggi-do, Korea, 3 MK Chem & Tech Co., Ltd, 167 Sanseong-ro, Danwon-gu, Ansan-si, Gyeonggi-do, 15434 Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 49-54.
Recently, System in Packaging(SIP) technology needs to meet high frequency (5G and more) communication technology and fine pitch surface treatment. The conventional Electroless Ni/Immersion Au plating(ENIG) is not suitable for high frequency range because of magnetic properties are increasing the transmission loss. Without nickel plating layer, the pattern and pad reliability level must be meet the condition. In this review paper, we investigated research trends on Ni-less surface treatment technology for high-frequency communication and frequency characteristics according to materials.
SiP, Transmission Loss, Surface Finish Technology, EPIG, DEG, Magnetic Properties
Department of Advanced Materials Engineering, Chungbuk National University, Chungdae-ro, Seowon-gu, Cheongju, Chungbuk 28644, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 55-62.
In this study, Sn-3.0Ag-0.5Cu (wt.%, SAC305) solder dipping process was performed between Ni-foam skeleton with different pore per inch (PPI) to fabricate Ni-foam/SAC305 composite solder, and then applied to the transient liquid phase (TLP) bonding process to evaluate the microstructure and mechanical properties of the bonded joint. The Ni-foam/SAC305 composite solder preform consisted of Ni-foam and SAC305, and an intermetallic compound (IMC) having a (Ni,Cu)3Sn4 composition was formed at the Ni-foam interface. During TLP bonding process, the IMC at the Ni-foam interface was converted to (Ni,Cu)3Sn4+Au, and as the bonding time increased, the Ni-foam and SAC305 continuously reacted, and the bonded joint was converted into an IMC. And it was confirmed that the 130 PPI Ni-foam/ SAC305 composite solder joint was converted into an IMC at the fastest rate. As a result of performing a shear test to confirm the effect of Ni-foam on mechanical properties, solder joints under all conditions exhibited excellent mechanical properties of 50 MPa or more in the early stages of the TLP bonding process, and the shear strength tends to increase as the bonding time increases.
Sn-3.0Ag-0.5Cu solder, Nickel foam, Intermetallic compound, Mechanical properties, Transient liquid phase bonding
1Department of Electronic Engineering, Chungnam National University, 99, Daehak-ro, Yuseong-gu, Daejeon, 34134, Korea, 2Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea, 3University of Science & Technology, 217, Gajeong-ro, Yuseong-gu, Daejeon, 34113, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 63-70.
Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heat-sensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.
Power semiconductor, Finite element method, Electric-thermal analysis, Direct bonded copper, Insulated metal substrate
Department of Materials Science and Engineering, Dong-A University, Saha-Gu, Busan, 49315, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 71-78.
The possibility of improving plating thickness distribution was investigated through quantitative consideration of bipolar electrodes without external power applied. By having the cathode tilted with respect to the anode, the potential distribution in the electrolyte solution adjacent to the cathode is different due to the difference in iR drop due to the path difference to the anode in each region of the cathode. The purpose of this study is to observe the bipolar characteristics in the case of an auxiliary anode for the non-uniform potential distribution of such a Hull cell. In particular, in order to evaluate the possibility of improving the non-uniform thickness distribution of the cathode by utilizing these bipolar characteristics, it was verified through experiments and simulations, and the electric potential and current density distribution around the bipolar electrode were analyzed. The electroplating in a Hull cell was performed for 75 min at a current density of 10 mA/cm2, and the average thickness is about 16 μm. The standard deviation of the thickness was 10 μm in the normal Hull cell without using the auxiliary anode, whereas it was 3.5 μm in the case of using the auxiliary cathode. Simulation calculations also showed 8.9 μm and 3.3 μm for each condition, and it was found that the consistency between the experimental and simulation results was relatively high, and the thickness distribution could be improved through using the auxiliary anode by the bipolar phenomenon.
Hull cell, electroplating, copper, numerical calculation
Department of Energy Engineering, Konkuk University, 120 Neungdong-ro, Seoul 05029, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 79-89.
Development of efficient and stable electrocatalysts for oxygen evolution reaction (OER) under acidic conditions is desirable goal for commercializing proton exchange membrane (PEM) water electroyzer. Herein, we report iridium-doped hydrogenated titanate (Ir–HTO) nanobelts as a promising catalyst with a low-Ir content for the acidic OER. Addition of low-Ir (~ 3.36 at%) into the single-crystalline HTO nanobelts with large exposed {100} facets significantly boost catalytic activity and stability for OER under acidic conditions. The Ir-HTO outperforms the commenrcial benchmark IrO2 catalyst; an overpotential for delivering 10 mA cm-2 current density was reduced to about 25% for the Ir-HTO. Moreover, the catalytic performance of Ir-HTO is positioned as the most efficient electrocatalyst for the acidic OER. An improved intrinsic catalytic activity and stability are also confirmed for the Ir-HTO through in-depth electrochemical characterizations. Therefore, our results suggest that low-Ir doped single-crystalline HTO nanobelts can be a promising catalyst for efficient and durable OER under acidic conditions.
Electrocatalyst, oxygen evolution reaction, hydrogenated titanate, low iridium
1Carbon & Light Materials Application R&D Group, Korea Institute of Industrial Technology, Jeonju 54853, Korea, 2School of Advanced Materials Science & Engineering, Sungkyunkwan University, Suwon 16419, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 90-94.
Carbon fiber(CF) with excellent thermal conductivity and electrical conductivity is attracting attention as an alternative material because metal heating elements have problems such as high heat loss and fire risk. However, since CF is oxidized and disconnected at about 200°C or higher, the application of heating elements is limited, and CF heating elements in the form of vacuum tubes are currently used in some commercial heaters. In this work, polyimide(PI) with high heat resistance was coated on the surface of carbon fiber by electrophoretic deposition to prevent oxidation of CF in the atmosphere without using a vacuum tube, and the coating thickness and heat resistance were investigated according to the applied voltage. The heater made by connecting the PI-coated CF heating elements in series showed stable heating characteristics up to 292°C, which was similar to the heating temperature result of the heat transfer simulation. The PI layer coated by the electrophoretic deposition method is effective in preventing oxidation of CF at 200°C or higher and is expected to be applicable to various heating components such as secondary batteries, aerospace, and electric vehicles that require heat stability.
Heating element, Carbon fiber, Electrophoretic deposition, Polyimide, Heater
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 95-95.
1 Engineering Research Center for Color-Modulated Extra-Sensory Perception Technology, Pusan National University, 30 Jangjeon-dong, Geumjeong-gu, Busan 46241, Korea, 2 Department of Cogno-Mechatronics Engineering, College of Nanoscience and Nanotechnology, Pusan National University, 30 Jangjeon-dong, Geumjeong-gu, Busan 46241, Korea, 3 Department of Optics and Mechatronics Engineering, College of Nanoscience and Nanotechnology, Pusan National University, 30 Jangjeon-dong, Geumjeong-gu, Busan 46241, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 1-12.
In the current era of the global mobile smart device revolution, electronic devices are required in all spaces that people interact with. The establishment of the internet of things (IoT) among smart devices has been recognized as a crucial objective to advance towards creating a comfortable and sustainable future society. In-mold electronic (IME) processes have gained significant industrial significance due to their ability to utilize conventional high-volume methods, which involve printing functional inks on 2D substrates, thermoforming them into 3D shapes, and injection-molded, manufacturing low-cost, lightweight, and functional components or devices. In this article, we provide an overview of IME and its latest advances in application. We review biomimetic nanomaterials for constructing self-supporting biosensor electronic materials on the body, energy storage devices, self-powered devices, and bio-monitoring technology from the perspective of in-mold electronic devices. We anticipate that IME device technology will play a critical role in establishing a human-machine interface (HMI) by converging with the rapidly growing flexible printed electronics technology, which is an integral component of the fourth industrial revolution.
in-mold electronics, IME, soft electronics, flexible printed electronics, healthcare device
1 Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 2 Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 3 Soft foundry institute, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 13-20.
The process of microelectromechanical system (MEMS) fabrication involves surface treatment to impart functionality to the device. Such surface treatment method is the self-assembled monolayer (SAM) technique, which modifies and functionalizes the surface of MEMS components with organic molecule monolayer, possessing a precisely controllable strength that depends on immersion time and solution concentration. These monolayers spontaneously adsorb on polymeric substrates or metal/ceramic components offering high precision at the nanoscale and modifying surface properties. SAM technology has been utilized in various fields, such as tribological property control, mass-production lithography, and ultrasensitive organic/biomolecular sensor applications. This paper provides an overview of the development and application of SAM technology in various fields.
Micro electro mechanical system, Self-assembled monolayer, Sensor, Surface treatment, Nano patterning
1 Department of Chemical Engineering, Chonnam National University, 77 Yongbong-ro, Buk-gu, Gwangju 61186, Republic of Korea, 2 Energy Convergence Core Facility, Chonnam National University, Gwangju 61186, Republic of Korea, 3 Photonic Semiconductor Research Center, Korea Photonics Technology Institute, Buk-gu, Gwangju 61007, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 21-32.
CuNWs(Copper nanowires) are attracting attention as a transparent electrode material because of their excellent electrical conductivity, high mechanical flexibility, and cost-effectiveness. However, since copper nanowires are easily oxidized, there is a disadvantage that properties of the transparent electrode may be deteriorated due to this, and researches are being conducted to improve this. Accordingly, in this review, various methods and studies to prevent oxidation and improve stability of copper nanowire transparent electrodes by using coating materials such as carbon-based materials, metals, and conductive polymers are introduced. Through this, we intend to provide solutions to solve the problem of development and oxidation of copper nanowire-based technology
Cu Nanowire, Transparent Electrode, Oxidation Resistance
1 Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology(KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea, 2 Department of Material Science and Engineering, Korea University, Seoul, 02841, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 33-42.
Throughout all industries, eco-friendliness is being promoted worldwide with focus on suppressing the environmental impact. With recent international environment policies and regulations supported by government, the electric vehicles demand is expected to increase rapidly. Battery system itself perform an essential role in EVs technology that is arranged in cells, modules, and packs, and each of them are connected mechanically and electrically. A multifaceted approach is necessary for battery pack bonding technologies. In this paper, pros and cons of applicable bonding technologies, such as resistance welding, laser and ultrasonic bonding used in constructing electric vehicle battery packs were compared. Each bonding technique has different advantages and limitations. Therefore, several criteria must be considered when determining which bonding technology is suitable for a battery cell. In particular, the shape and production scale of battery cells are seen as important factors in selecting a bonding method. While dealing with the types and components of battery cells, package bonding technologies and general issues, we will review suitable bonding technologies and suggest future directions.
Battery joining technologies, Electric Vehicle, Battery cell, Battery module, Dissimilar materials
Advanced Joining & Additive Manufacturing R&D Department / Micro-Joining Center, Korea Institute of Industrial Technology (KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 43-51.
In this paper, we introduce the development trends of power devices which is the key component for power conversion system in electric vehicles, and discuss the characteristics of the next-generation wide-bandgap (WBG) power devices. We provide an overview of the characteristics of the present mainstream Si insulated gate bipolar transistor (IGBT) devices and technology roadmap of Si IGBT by different manufacturers. Next, recent progress and advantages of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) which are the most important unipolar devices, is described compared with conventional Si IGBT. Furthermore, due to the limitations of the current GaN power device technology, the issues encountered in applying the power conversion module for electric vehicles were described.
silicon carbide (SiC), gallium nitride (GaN), power device, field-effect transistor, avalanche breakdown, channel mobility
1 STATS ChipPAC Korea Ltd, 191, Jayumuyeok-ro, Jung-gu, Incheon, 22379, Korea, 2 School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 52-59.
The effects of dielectric curing temperature and temperature/humidity treatment conditions on the interfacial adhesion energies between Ti diffusion barrier/polybenzoxazole (PBO) dielectric layers were systematically investigated for Cu redistribution layer applications of fan-out wafer level package. The initial interfacial adhesion energies were 16.63, 25.95, 16.58 J/m2 for PBO curing temperatures at 175, 200, and 225 ℃, respectively. X-ray photoelectron spectroscopy analysis showed that there exists a good correlation between the interfacial adhesion energy and the C-O peak area fractions at PBO delaminated surfaces. And the interfacial adhesion energies of samples cured at 200 ℃ decreased to 3.99 J/m2 after 500 h at 85 ℃/85 % relative humidity, possibly due to the weak boundary layer formation inside PBO near Ti/PBO interface.
fan-out package, interfacial adhesion energy, 4-point bending test, polybenzoxazole, Cu redistribution layer
School of Chemical Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 60-64.
In this study, the electrical contact resistance characteristics between graphene and metals, which is one of important factors for the performance of graphene-based devices, were compared. High-quality graphene was synthesized by chemical vapor deposition (CVD) method, and Al, Cu, Ni, and Ti as electrode materials were deposited on the graphene surface with equal thickness of 50 nm. The contact resistances of graphene transferred to SiO2/Si substrates and metals were measured by the transfer length method (TLM), and the average contact resistances of Al, Cu, Ni, and Ti were found to be 345 Ω, 553 Ω, 110 Ω, and 174 Ω, respectively. It was found that Ni and Ti, which form chemical bonds with graphene, have relatively lower contact resistances compared to Al and Cu, which have physical adsorption properties. The results of this study on the electrical properties between graphene and metals are expected to contribute to the realization of highperformance graphene-based devices including electronics, optoelectronic devices, and sensors by forming low contact resistance with electrodes.
Graphene, Metal, Contact resistance, Chemical vapor deposition, Field effect transistor
1 Department of Materials Science and Engineering, Pukyong National University, Busan 48513, Republic of Korea, 2 RanoM R&D center, RanoM Co., Ltd., Pusan 48548, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 65-70.
Nanoimprint lithography (NIL) has attracted much attention due to its process simplicity, excellent patternability, process scalability, high productivity, and low processing cost for pattern formation. However, the pattern size that can be implemented on metal materials through conventional NIL technologies is generally limited to the micro level. Here, we introduce a novel hard imprint lithography method, extreme-pressure imprint lithography (EPIL), for the direct nano-tomicroscale pattern formation on the surfaces of metal substrates with various thicknesses. The EPIL process allows reliable nanoscopic patterning on diverse surfaces, such as polymers, metals, and ceramics, without the use of ultraviolet (UV) light, laser, imprint resist, or electrical pulse. Micro/nano molds fabricated by laser micromachining and conventional photolithography are utilized for the nanopatterning of Al substrates through precise plastic deformation by applying high load or pressure at room temperature. We demonstrate micro/nanoscale pattern formation on the Al substrates with various thicknesses from 20 µm to 100 mm. Moreover, we also show how to obtain controllable pattern structures on the surface of metallic materials via the versatile EPIL technique. We expect that this imprint lithography-based new approach will be applied to other emerging nanofabrication methods for various device applications with complex geometries on the surface of metallic materials.
Imprint lithography, Al foil, Al plate, Nanostructure
School of Chemical Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 71-75.
In this study, inorganic perovskite films with different compositions were grown by thermal chemical vapor deposition depending on the substrate and their optical properties were compared. Inorganic perovskite crystals were grown on SiO2/Si and c-Al2O3 substrates using CsBr and PbBr2, respectively, under the same growth conditions. Cs4PbBr6-CsPbBr3 crystallites were grown on the SiO2 with polycrystalline structure, while a CsPbBr3 (100) dominant thin film was formed on the c-Al2O3 substrate with single crystal structure. From the photoluminescence measurement, CsPbBr3 showed typical green emission centered at 534 nm with a full width at half maximum (FWHM) of about 91 meV. The Cs4PbBr6-CsPbBr3 mixed structure exhibits blue-shifted emission at 523 nm with a narrow FWHM of 63 meV and a fast decay time of 6.88 ns. These results are expected to be useful for application in photoelectric devices such as displays, solar cells, and light sensors based on inorganic metal perovskites.
Metal halide perovskite, Thermal chemical vapor deposition, CsPbBr3, Cs4PbBr6, Photoluminescence
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 76-76.
Department of Advanced Materials Engineering, Chungbuk National University, Chungdae-ro, Seowon-gu, Cheongju, Chungbuk 28644, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 1-10.
Recently, as the demand for high-performance computers and mobile products increases, semiconductor packages are becoming high-integration and high-density. Therefore, in order to transmit a large amount of data at once, micro bumps such as flip-chip and Cu pillar that can reduce bump size and pitch and increase I/O density are used. However, when the size of the bumps is smaller than 70 μm, the brittleness increases and electrical properties decrease due to the rapid increase of the IMC volume fraction in the solder joint, which deteriorates the reliability of the solder joint. Therefore, in order to improve these issues, a layer that serves to prevent diffusion is inserted between the UBM (Under Bump Metallization) or pillar and the solder cap. In this review paper, various studies to improve bonding properties by suppressing excessive IMC growth of micro-bumps through additional layer insertion were compared and analyzed.
3D IC Package, Micro-bumps, Cu pillar, Intermetallic compound, Diffusion barrier
Department of Materials Science & Engineering, University of Seoul, Seoul, Rep. of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 11-19.
Recently with the rapid advancement of artificial intelligence (AI) technologies such as Chat GPT, AI semiconductors have become important. AI technologies require the ability to process large volumes of data quickly, as they perform tasks such as big data processing, deep learning, and algorithms. However, AI semiconductors encounter challenges with excessive power consumption and data bottlenecks during the processing of large-scale data. Thus, the latest packaging technologies are required for AI semiconductor computations. In this study, the authors have described packaging technologies applicable to AI semiconductors, including interposers, Through-Silicon-Via (TSV), bumping, Chiplet, and hybrid bonding. These technologies are expected to contribute to enhance the power efficiency and processing speed of AI semiconductors
Artificial Intelligence (AI), 2.5-dimensional packaging, Through-Si-Via (TSV), Chiplet, Hybrid bonding
1 Department of Smart Fab Technology, Sungkyunkwan University, 2066 Seobu-ro, Jangan-gu, Suwon, Gyeonggi-do 16419, Republic of Korea, 2 School of Advanced Materials Science and Engineering, Sungkyunkwan University, 2066 Seobu-ro, Jangan-gu, Suwon, Gyeonggi-do 16419, Republic of Korea, 3 School of Mechanical Engineering, Sungkyunkwan University, 2066 Seobu-ro, Jangan-gu, Suwon, Gyeonggi-do 16419, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 20-24.
Single or multi-layered two-dimensional (2D) materials, with thicknesses in the order of a few nanometers, have garnered substantial attention across diverse research domains owing to their distinct properties, including electrical conductivity, flexibility, and optical transparency. These materials are frequently subjected to repetitive mechanical actions in applications like electronic skin (E-Skin) and smart textiles. Moreover, they are often exposed to external factors like temperature, humidity, and pressure, which can lead to a deterioration in component durability and lifespan. Consequently, significant research efforts are directed towards developing self-healing properties in these components. Notably, recent investigations have revealed promising outcomes in the field of self-healing composite materials, with Ti3C2Tx MXene being a prominent component among the myriad of available 2D materials. In this paper, we aim to introduce various synthesis methods and characteristics of Ti3C2Tx MXene, followed by an exploration of self-healing application technologies based on Ti3C2Tx MXene.
Ti3C2Tx MXene, MXene electrode, Self-Healing, 2D materials, Wearable sensor
PKG development, SK hynix, 2091, Gyeongchung-daero, Bubal-eub, Icheon-si Gyeonggi-do, 17336, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 35-39.
ESG (Environment, Social, Governance) has become a major guideline for many companies to improve corporate value and enable sustainable management. Among them, the environment requires a technological approach. This is because technological solutions are needed to reduce or prevent environmental pollution and save energy. Semiconductor package technology has been developed to better satisfy the essential roles of semiconductor packaging: chip protection, electrical/mechanical connection, and heat dissipation. Accordingly, technologies have been developed to improve heat dissipation effect, improve electrical/mechanical properties, improve chip protection reliability, stacking and miniaturization, and reduce costs. Among them, heat dissipation technology increases thermal efficiency and reduces energy consumption for cooling. Also, technology to improve electrical characteristics has had an impact on the environment by reducing energy consumption. Technologies that recycling or reducing material consumption reduce environmental pollution. And technologies that replace environmentally harmful substances contribute to environmental improvement, in particular. In this paper, I summarize trends in semiconductor package technologies to prevent pollution and improve environment.
ESG(Environment, Social, Governance), TSV(Through Si Via), Fine pitch I/O(input/output), Heat Dissipation, Energy Consumption, Recycle
1 Department of Nano IT Fusion Engineering, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul, Republic of Korea, 2 Department of Intelligent Semiconductor Engineering, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 40-50.
Recently, the number of components of smartphones increases rapidly, while the PCB size continuously decreases. Therefore, 3D technology with a stacked PCB has been developed to improve component density in smartphone. F or the stacked PCB, it is very important to obtain solder bonding quality between PCBs. We investigated the effects of the properties, thickness, and number of layers of interposer PCB and sub PCB on warpage of PCB through experimental and numerical analysis to improve the reliability of the stacked PCB. The warpage of the interposer PCB decreased as the thermal expansion coefficient (CTE) of the prepreg decreased, and decreased as the glass transition temperature (Tg) increased. However, if temperature is 240°C or higher, the reduction of warpage is not large. As FR-5 was applied, the warpage decreased more compared to FR-4, and the higher the number and thickness of the prepreg, the lower the warpage. For sub PCB, the CTE was more important for warpage than Tg of the prepreg, and increase in prepreg thickness was more effective in reducing the warpage. The shear tests indicated that the dummy pad design increased bonding strength. The tumble tests indicated that crack occurrence rate was greatly reduced with the dummy pad.
Stacked PCB, Interposer, Prepreg, Warpage, Reliability
Department of Electronic Engineering, Korea National University of Transportation, Chungju, 308-702, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 51-55.
Measurement of the ferroelectric polarization hysteresis curve is an important means of overall evaluation and interpretation of the ferroelectric structure and dielectric properties. If a resistive component is included in the ferroelectric sample, an error is included in the measured value of the spontaneous polarization. When configuring the electrical circuit to measure the polarization, by properly utilizing the external resistance corresponding to the resistive component included in the sample, the error due to the resistive loss of the sample was excluded and the size of the ferroelectric polarization induced inside could be accurately measured. It is expected that the displacement and dielectric characteristics of ions inside the ferroelectric can be more accurately evaluated through the evaluation of such an accurate polarization hysteresis curve
Polarization, Hysteresis, Ferroelectrics, Error correction
1 Department of Flexible and Printable Electronics, LANL‐JBNU Engineering Institute‐Korea, Jeonbuk National University, 567 Baekje-daero, Deokjin-gu, Jeonju 54896, Republic of Korea, 2 Department of JBNU-KIST Industry-Academia Convergence Research, Jeonbuk National University, 567 Baekje-daero, Deokjin-gu, Jeonju 54896, Republic of Korea, 3 Functional Composite Materials Research Center, Institute of Advanced Composite Materials, Korea Institute of Science and Technology, Jeollabuk-do 55324, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 56-63.
In this paper, we studied the effect of electron beam irradiation on sol-gel indium-gallium-zinc oxide (IGZO) thin films under air and nitrogen atmosphere and carried out the electrical characterization of the s ol-gel IGZO thin film transistors (TFTs). To investigate the optical properties, crystalline structure and chemical state of the sol-gel IGZO thin films after electron beam irradiation, UV-Visible spectroscopy, X-ray diffraction (XRD), and X-ray photoelectron spectroscopy (XPS) were carried out. The sol-gel IGZO thin films exhibited over 80% transmittance in the visible range. The XRD analysis confirmed the amorphous nature of the sol-gel IGZO films regardless of electron beam irradiation. When electron beam irradiation was conducted in a nitrogen (N2) atmosphere, we observed an increased proportion of peaks related to M-O bonding contributed to the improved quality of the thin films. Sol-gel IGZO TFTs subjected to electron beam exposure in a nitrogen atmosphere exhibited enhanced electrical characteristics in terms of on/off ratio and electron mobility. In addition, the electrical parameters of the transistor (on/off ratio, threshold voltage, electron mobility, subthreshold swing) remained relatively stable over time, indicating that the electron beam exposure process in a nitrogen atmosphere could enhance the reliability of IGZO-based thin-film transistors in the fabrication of sol-gel processed TFTs.
Indium-Gallium-Zinc Oxide (IGZO), Thin-film transistors (TFTs), electron beam irradiation (EBI), Sol-gel, Electrical characteristics
Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology (KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 64-72.
In this study, after transferring graphene on a Cu substrate and printing a Sn-3.0Ag-0.5Cu Pb-free solder paste on the Cu substrate, effects of the transferred graphene on formations and growths of intermetallic compound (IMC) at the interface between the Cu substrate and the solder were reported during processes of reflow soldering and isothermal aging for 1000 h with various temperatures (125, 150, and 175 ℃). Thicknesses of Cu6Sn5 and Cu3Sn IMCs at the interfaces with graphene were decreased during the reflow soldering and isothermal aging processes compared to those without graphene. The transferred graphene layers also showed that the growth rate constant and square of growth rate constant which related to the growth mechanisms of Cu6Sn5 and Cu3Sn IMCs with the temperature and time of the isothermal aging c ould dramatically decreased.
Cu substrate, Sn-3.0Ag-0.5Cu, transferred graphene, intermetallic compound, reflow soldering, isothermal aging
Seoul National University of Science and Technology, 232 Gongneung-ro, Buk-gu, Seoul 01811
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 73-77.
In this study, we developed a Multi-level FeRAM (Ferroelectrics random access memory) device utilizing different ferroelectric materials and analyzed its operation through C-V analysis using simulations. To achieve Multi-level operation, we proposed an MFM (Multi-Ferroelectric Material) structure by depositing two different ferroelectric materials with distinct properties horizontally on the same bottom electrode and subsequently adding a gate electrode on top. By analyzing C-V peaks based on the polarization phenomenon occurring under different voltage conditions for the two materials, we confirmed the feasibility of achieving Multi-level operation, where either one or both of the materials can be polarized. Furthermore, we validated the process for implementing the proposed structure using semiconductor fabrication through process simulations. These results signify the significance of the new structure as it allows storing multiple states in a single memory cell, thereby greatly enhancing memory integration.
Ferroelectric, FeRAM, Multi-level, Memory, Polarization
Smart Electronics Research Center, Korea Electronics Technology Institute 111, Ballyong-ro, Deokjin-gu, Jeonju-si, Jeollabuk-do 54853, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 78-82.
A fabrication of smart windows with controllable visible light transmittance in three steps by using λ/2 retardation films based on a reactive mesogen (RM) material and polarizing films is demonstrated. The phase retardation films with a Δn·d value of λ/2 (λ: wavelength) convert the direction of a traveling light to the optical axis of the film symmetrically. In this work, the retardation characteristics according to the RM thickness were evaluated and henceλ/2 phase retardation film can be fabricated. The phase retardation film with Δn·d of 276.1 nm, which is close to λ/2 (=275 nm @550 nm), was fabricated. The light transmittance of a smart window with the structure of (polarizing film)/(glass)/(alignment layer)/(λ/2 retardation film) was measured in the transmission mode, half mode and blocking mode. The evaluation results show that the transmittance of the smart window can be controlled in three steps with 35.8%, 27.8%, and 18.2% at each mode, respectively. In addition, by fabricating a smart window with a size of 150×200 mm2, the feasibility of use in various fields such as buildings and automobiles was verified.
Smart window, Phase retardation, Retarder, Reactive mesogen, Transmittance-variable
Seoul National University of Science and Technology, 232 Gongneung-ro, Buk-gu, Seoul 01811
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 83-87.
In the field of electronics and semiconductor technology, innovative semiconductor material research to replace Si is actively ongoing. However, while research on alternative materials is underway, there is a significant lack of studies regarding the relationship between 2D materials used as channels in transistors, especially parasitic resistance, and RF (radio frequency) applications. This study systematically analyzes the impact on electrical performance with a focus on various transistor structures to address this gap. The research results confirm that access resistance and contact resistance act as major factors contributing to the degradation of semiconductor device performance, particularly when highly scaled down. As the demand for high-frequency RF components continues to grow, establishing guidelines for optimizing component structures and elements to achieve desired RF performance is crucial. This study aims to contribute to this goal by providing structural guidelines that can aid in the design and development of next-generation RF transistors using 2D materials as channels.
2D Channel, Field Effect Transistor, RF Device, Analog Device, Access Resistance, Contact Resistance
Department of Smart Manufacturing R&D System, Korea Institute of industrial Technology, 89, Yangdaegiro-gil, Ipjang-myeon, Seobuk-gu, Cheonan-si, Chungcheongnam-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 88-93.
As the demand for High Bandwidth Memory (HBM) increases and the handling capability of larger wafers expands, ensuring reliable Total Thickness Variation (TTV) measurement for stacked wafers becomes essential. This study presents the design of a measurement module capable of measuring TTV across the entire area of a 300mm wafer, along with estimating potential mechanical measurement errors. The module enables full-area measurement by utilizing a center chuck and lift pin for wafer support. Modal analysis verifies the structural stability of the module, confirming that both the driving and measuring parts were designed with stiffness exceeding 100 Hz. The mechanical measurement error of the designed module was estimated, resulting in a predicted measurement error of 1.34 nm when measuring the thickness of a bonding wafer with a thickness of 1,500 μm.
Total thickness variation(TTV), High bandwidth memory(HBM), Cattier wafer, Device wafer, Temporary bonding & debonding(TBDB)
Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 94-101.
Zinc oxide(ZnO) is a semiconductor material with a bandgap of 3.37 eV and an exciton binding energy of 60 meV for various applications. Recently ZnO has been proven to enhance its electrical properties for utilization as an alternative for transparent conducting oxide (TCO) materials. In this study, cation(Al, Ga)-anion(F) single and double doped ZnO thin films were grown by atomic layer deposition (ALD) to enhance the electrical properties. The structural and optical properties of doped ZnO thin films were analyzed, and doping effects were confirmed to electrical characteristics. In single doped ZnO, it was observed that the carrier concentration was increased after doping, acting as a donor to ZnO. Among the single doping elements, F doped ZnO(FZO) showed the highest mobility and conductivity due to the passivation effect of oxygen vacancies. In the case of double doping, higher electrical characteristics were observed compared to single doping. Among the samples, Al-F doped ZnO(AFZO) exhibited the lowest resistance value. This results can be attributed to an increase in delocalized electron states and a decrease in lattice distortion resulting from the differences in ionic radius. The partial density of states(PDOS) was also analyzed and observed to be consistent with the experimental results.
ZnO, codoping, atomic layer deposition
Micro-Joining Center, Joining R&D Group, Korea Institute of Industrial Technology, Incheon 21999, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 102-110.
This paper introduces scarf welding process of thin substrates using flexible laser transmission welding (f-LTW) technology. We examined the behavior of tensile strength relative to the scarf angle for flexible applications. Thin plastic substrates with the thickness of less than 100 μm were bonded and a jig to form a slope at the edge of the substrate was developed. By developing the scarf welding process, we successfully created a flexible bonding technology that maintains joint’s thickness after the process. The tensile strength of the joint was assessed through uniaxial test, and we found that the tensile strength increases as the slope of bonding interface decreases. By conducting stress analysis at the bonding interface with respect to the slope angle, design factor of bonding structure was investigated. These findings suggest that the tensile strength depends on the geometry of the joint, even under the same process conditions, and highlights the significance of considering the geometry of the joint in welding processes.
thin substrate, scarf welding, laser bonding, stress analysis
1 Department of Materials Science and Engineering, Dankook University, Dandae-ro 119, Dongnam-gu, Cheonan-si, Chungnam 31116, Korea, 2 Department of Physics, Dankook University, Dandae-ro 119, Dongnam-gu, Cheonan-si, Chungnam 31116, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 111-118.
MXene, a two-dimensional transition metal carbide or nitride, has recently attracted much attention as a lightweight and flexible electromagnetic shielding material due to its high electrical conductivity, good mechanical strength and thermal stability. In particular, the Ti-based MXene, Ti3C2Tx and Ti2CTx are reported to have the best electrical conductivity and electromagnetic shielding properties in the vast MXene family. Therefore, in this study, Ti3C2Tx and Ti2CTx films were prepared by vacuum filtration using Ti3C2Tx and Ti2CTx dispersions synthesized by interlayer metal etching and centrifugation of Ti3AlC2 and Ti2AlC. The electrical conductivity and electromagnetic shielding efficiency of the films were measured after heat treatment at high temperature. Then, X-ray diffraction and photoelectron spectroscopy were performed to analyze the structural changes of Ti3C2Tx and Ti2CTx films after heat treatment and their effects on electromagnetic shielding. Based on the results of this study, we propose an optimal structure for an ultra-thin, lightweight, and high performance MXene-based electromagnetic shielding film for future applications in small and wearable electronics.
MXene, Ti3C2Tx, Ti2CTx, heat treatment, EMI shielding material
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 119-119.
School of Chemical Engineering, Chonnam National University, 77 Yongbong-ro, Buk-gu, Gwangju 61186, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 1-7.
The ability of 3D/4D printing technology to create arbitrary 3D structures provides a greater degree of freedom in the design of printed structures. This capability has influenced the field of electronics and biomedical applications by enabling the trends of device miniaturization, customization, and personalization. Here, the current stateof-the-art knowledge of 3D printed electronics and biomedical applications with the unique and unusual properties enabled by 3D/4D printing is reviewed. Specifically, the review encompasses emerging areas involving recyclable and degradable electronics, metamaterial-based pressure sensor, fully printed portable photodetector, biocompatible and high-strength teeth, bioinspired microneedle, and transformable tube array for 3D cell culture and histology.
3D printing, 4D printing, Electronics, Biomedical applications
Department of Semiconductor Engineering, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul, 01811, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 8-16.
The importance of next-generation packaging technologies is being emphasized as a solution as the miniaturization of devices reaches its limits. To address the bottleneck issue, there is an increasing need for 2.5D and 3D interconnect pitches. This aims to minimize signal delays while meeting requirements such as small size, low power consumption, and a high number of I/Os. Hybrid bonding technology is gaining attention as an alternative to conventional solder bumps due to their limitations such as miniaturization constraints and reliability issues in high-temperature processes. Recently, there has been active research conducted on SiCN to address and enhance the limitations of the Cu/ SiO2 structure. This paper introduces the advantages of Cu/SiCN over the Cu/SiO2 structure, taking into account various deposition conditions including precursor, deposition temperature, and substrate temperature. Additionally, it provides insights into the core mechanisms of SiCN, such as the role of Dangling bonds and OH groups, and the effects of plasma surface treatment, which explain the differences from SiO2. Through this discussion, we aim to ultimately present the achievable advantages of applying the Cu/SiCN hybrid bonding structure.
3D IC Package, Hybrid bonding, SiCN Dielectric, Cu/SiCN
1Department of Advanced Chemicals & Engineering, Chonnam National University, Gwangju, Republic of Korea, 2Optoelectronics Convergence Research Center, Chonnam National University, Gwangju, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 17-31.
Amidst escalating global warming fueled by indiscriminate fossil fuel consumption, concerted efforts are underway worldwide to mitigate atmospheric carbon dioxide (CO2) levels. Electrochemical CO2 reduction technology is recognized as a promising and environmentally friendly approach to convert CO2 into valuable hydrocarbon compounds, deemed essential for achieving carbon neutrality. Copper, among the various materials used as CO2 reduction electrodes, is known as the sole metal capable of generating C2+ compounds. However, low conversion efficiency and selectivity have hindered its widespread commercialization. This review highlights diverse research endeavors to address these challenges. It explores various studies focused on utilizing copper-based electrodes for CO2 reduction, offering insights into potential solutions for advancing this crucial technology.
Carbon dioxide reduction, Electrochemical catalysis, Copper-based electrodes, C2+ compound generation
Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 32-43.
Resistive Random Access Memory (RRAM), based on resistive switching characteristics, is emerging as a next-generation memory device capable of efficiently processing large amounts of data through its fast operation speed, simple device structure, and high-density implementation. Interface type resistive switching offer the advantage of low operation currents without the need for a forming process. Especially, for RRAM devices based on transition metal oxides, various studies are underway to enhance the memory characteristics, including precise material composition control and improving the reliability and stability of the device. In this paper, we introduce various methods, such as doping of heterogeneous elements, formation of multilayer films, chemical composition adjustment, and surface treatment to prevent degradation of interface type resistive switching properties and enhance the device characteristics. Through these approaches, we propose the feasibility of implementing high-efficient next-generation non-volatile memory devices based on improved resistive switching properties.
Interface-type, RRAM, Resistive switching, Transition metal oxide
1Department of Optics and Mechatronics engineering, Pusan National University, 2, Busandaehak-ro 63beon gil, Geumjeong-gu, Busan, Republic of Korea, 2Department of Cogno-Mechatronics Engineering, Pusan National University, 2, Busandaehak-ro 63beon gil, Geumjeong-gu, Busan, Republic of Korea, 3Solution Division of Soft-Tech Internationl,Inc3, 168, Gasandigital1-ro, Geumcheon-gu, Seoul, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 44-49.
In the global pursuit of carbon neutrality, the rapid increase in the adoption of electric vehicles (EVs) has led to a corresponding surge in the demand for batteries. To achieve high efficiency in electric vehicles, considerations of weight reduction and battery safety have become crucial factors. Copper and aluminum, both recognized as lightweight materials, can be effectively joined through laser welding. However, due to the distinct physical characteristics of these two materials, the process of joining them poses technical challenges. This study focuses on conducting simulations to identify the optimal laser parameters for welding copper and aluminum, with the aim of streamlining the welding process. Additionally, a Graphic User Interface (GUI) program has been developed using the Python language to visually present the results. Using machine learning image data, this program is anticipated to predict joint success and serve as a guide for safe and efficient laser welding. It is expected to contribute to the safety and efficiency of the electric vehicle battery assembly process.
Laser welding, Battery, Random Forest, CFD, Heterojunction
1School of Mechanical Engineering, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea, 2Department of Smart Fab. Technology, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea, 3Department of Intelligent Robotics, Sungkyunkwan University, Seobu-ro 2066, Suwon-si, Gyeonggi-do, 16419, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 50-60.
Ball Grid Array (BGA) is a widely used package type due to its high pin density and good heat dissipation. In BGA, solder balls play an important role in electrically connecting the package to the PCB. Therefore, understanding the inelastic deformation of solder balls under various mechanical loads is essential for the robust design of semiconductor packages. In this study, the geometrical effect on the inelastic deformation and fracture of solder balls were analyzed by finite element analysis. The results showed that fracture occurred in both tilted and hourglass shapes under shear loading, and no fracture occurred in all cases under compressive loading. However, when bending was applied, only the tilted shape failed. When shear and bending loads were combined with compression, the stress triaxiality was maintained at a value less than zero and failure was suppressed. Furthermore, a comparison using the Lagrangian-Green strain tensor of the critical element showed that even under the same loading conditions, there was a significant difference in deformation depending on the shape of the solder ball.
Numerical analysis, Inelastic deformation, Fracture, Solder, Packaging
1Dept. of Welding & Joining Science Engineering, Chosun University 309 Pilmoon-daero, Dong-gu, Gwangju 61452, Korea, 2Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology, 156 Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 61-68.
In this study, Sn-3.5Ag-15.0Fe composite solder was manufactured and applied to TLP bonding to change the entire joint into a Sn-Fe IMC(intermetallic compound), thereby applying it as a high-temperature solder. The FeSn2 IMC formed during the bonding process has a high melting point of 513℃, so it can be stably applied to power modules for power semiconductors where the temperature rises up to 280℃ during use. As a result of applying ENIG surface treatment to both the chip and substrate, a multi-layer IMC structure of Ni3Sn4/FeSn2/Ni3Sn4 was formed at the joint. During the shear test, the fracture path showed that cracks developed at the Ni3Sn4/FeSn2 interface and then propagated into FeSn2. After 2hours of the TLP joining process, a shear strength of over 30 MPa was obtained, and in particular, there was no decrease in strength at all even in a shear test at 200°C. The results of this study can be expected to lead to materials and processes that can be applied to power modules for electric vehicles, which are being actively researched recently.
Sn-Ag-Fe, composite solder, TLP bonding, power module
1School of Computer Engineering, Hansung University, 116, Samseongyo-ro 16-gil, Seongbuk-gu, Seoul, Republic of Korea, 2R&D Center, Genesem, 24, Songdogwahak-ro 84beon-gil, Yeonsu-gu, Incheon, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 69-78.
With the rapid growth of artificial intelligence, the demand for semiconductors is enormously increasing everywhere. To ensure the manufacturing quality and quantity simultaneously, the importance of automatic defect detection during the packaging process has been re-visited by adapting various deep learning-based methodologies into automatic packaging defect inspection. Deep learning (DL) models require a large amount of data for training, but due to the nature of the semiconductor industry where security is important, sharing and labeling of relevant data is challenging, making it difficult for model training. In this study, we propose a new framework for securing sufficient data for DL models with fewer computing resources through a divide-and-conquer approach. The proposed method divides high-resolution images into pre-defined sub-regions and assigns conditional labels to each region, then trains individual sub-regions and boundaries with boundary loss inducing the globally coherent and seamless images. Afterwards, full-size image is reconstructed by combining divided sub-regions. The experimental results show that the images obtained through this research have high efficiency, consistency, quality, and generality.
Data Augmentation, Generative Adversarial Networks, Artificial Intelligence, Performance Optimization
1Department of Electronic Materials, Devices and Equipment Engineering, Soonchunhyang University, 22 Soonchunhyang-ro, Asan-si, Chungcheongnam-do 31538, Korea, 2Department of Display and Materials Engineering, Soonchunhyang University, 22 Soonchunhyang-ro, Asan-si, Chungcheongnam-do 31538, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 79-85.
A novel low-temperature co-fired ceramic (LTCC) dielectric, composed of (1-4x)Bi1.5Zn1.0Nb1.5O7-3xBi2Zn2/3Nb4/3O7-2xLiZnNbO4 (x=0.03-0.21), was synthesized through reactive liquid phase sintering of Bi1.5Zn1.0Nb1.5O7-xLi2CO3 ceramic at temperatures ranging from 850℃ to 920℃ for 4 hours. During sintering, Li2CO3 reacted with Bi1.5Zn1.0Nb1.5O7, resulting in the formation of Bi2Zn2/3Nb4/3O7, and LiZnNbO4. The resulting sintered body exhibited a relative sintering density exceeding 96% of the theoretical density. By altering the initial Li2CO3 content (x) and consequently modulating the volume fraction of Bi1.5Zn1.0Nb1.5O7, Bi2Zn2/3Nb4/3O7, and LiZnNbO4 in the final sintered body, a sample with high dielectric constant (εr), low dielectric loss (tan δ), and the temperature coefficient of dielectric constant (TCε) characterized by NP0 specification (TCε ≤ ±30 ppm/℃) was achieved. As the Li2CO3 content increased from x=0.03 mol to x=0.15 mol, the volume fraction of Bi2Zn2/3Nb4/3O7 and LiZnNbO4 in the composite increased, while the volume fraction of Bi1.5Zn1.0Nb1.5O7 decreased. Consequently, the dielectric constant (εr) of the composite materials varied from 148.38 to 126.99, the dielectric loss (tan δ) shifted from 5.29×10-4 to 3.31×10-4, and the temperature coefficient of dielectric constant (TCε) transitioned from -340.35 ppm/℃ to 299.67 ppm/℃. A dielectric exhibiting NP0 characteristics was achieved at x=0.09 for Li2CO3, with a dielectric constant (εr) of 143.06, a dielectric loss (tan δ) value of 4.31×10-4, and a temperature coefficient of dielectric constant (TCε) value of -9.98 ppm/℃. Chemical compatibility experiment with Ag electrode revealed that the developed composite material exhibited no reactivity with the Ag electrode during the co-firing process.
Bi1.5Zn1.0Nb1.5O7, Li2CO3, Bi2Zn2/3Nb4/3O7, LiZnNbO4, LTCC, NP0
1Department of Cogno-Mechatronics Engineering, Pusan National University, Geumjeong-gu, Busan 46241, Korea, 2Department of Opto-Mechatronics Engineering, Pusan National University, Busan 46241, Korea, 3Materials and Components Research Division, Electronics and Telecommunications Research Institute (ETRI), 218 Gajeongno, Yuseong-gu, Daejeon, 34129 Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 86-90.
The packaging of electronic devices performs a protective function to ensure that their durability and reliability are not affected by changes in the operating environment caused by external factors. Recent advances in materials have led to ongoing research into bonded packaging of heterogeneous materials such as polymers and inorganic materials in electronic devices. In this packaging process, it is important to have a binding that joins the materials and ensures the operating environment, which includes adhesion to the substrate, corrosion and oxidation resistance through moisture removal, and durability. In this study, the hygroscopicity of the coating layer by modifying the polymer surface based on PVA was evaluated by controlling and measuring the contact angle, and the adhesion was confirmed by applying water-based ink and testing according to ASTM_D3363. For the durability of the polymer surface, the IPL post-treatment process was used to improve the hardness and toughness against applied voltage, and the pencil hardness test and nanoindentation test were conducted. Through this, we analyzed and proposed solutions to ensure the reliability and durability of polymer devices in polymer microfabrication against environmental factors such as moisture, temperature fluctuations and adhesion, and surface abrasion.
Packaging, Hygroscopicity, Adhesion, IPL, Gradient Hardness
1Department of Chemicals & Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea, 2Photonics Energy Materials Research Center, Korea Photonics Technology Institute (KOPTI), Cheomdanbencheo-ro 108 beon-gil 9, Buk-gu, Gwangju 61007, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 91-97.
Electrochemical (EC) CO2 reduction is a promising method to convert CO2 into valuable hydrocarbon fuels and chemicals ecofriendly. Here, we report on a facile method to synthesize surface-controlled SnO2/Cu(OH)2 nanowires (NWs) and its EC reduction of CO2 to HCOOH and CO. The SnO2/Cu(OH)2 NWs (-16 mA/cm2 ) showed superior electrochemical performance compared to Cu(OH)2 NWs (-6 mA/cm2 ) at -1.0 V (vs. RHE). SnO2/Cu(OH)2 NWs showed the maximum Faradaic efficiency for conversion to HCOOH (58.01 %) and CO (29.72 %). The optimized catalyst exhibits a high C1 Faradaic efficiency stable electrolysis for 2 h in a KHCO3 electrolyte. This study facilitates the potential for the EC reduction of CO2 to chemical fuels.
Electrochemical (EC), CO2 reduction (CO2RR), Copper-based catalysts, Tin oxide (SnO2)
1Department of Materials Science & Engineering, Seoul National University of Science and Technology, Seoul 01811, Republic of Korea, 2Low-Carbon Integration Tech, Creative Research Section, ETRI, Daejeon 34129, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 98-104.
The feasibility of an efficient process proposed for Cu-Cu flip-chip bonding was evaluated by forming a porous Cu layer on Cu pillar and conducting thermo-compression sinter-bonding after the infiltration of a reducing agent. The porous Cu layers on Cu pillars were manufactured through a three-step process of Zn plating-heat treatment-Zn selective etching. The average thickness of the formed porous Cu layer was approximately 2.3 µm. The flip-chip bonding was accomplished after infiltrating reducing solvent into porous Cu layer and pre-heating, and the layers were finally conducted into sintered joints through thermo-compression. With reduction behavior of Cu oxides and suppression of additional oxidation by the solvent, the porous Cu layer densified to thickness of approximately 1.1 µm during the thermo-compression, and the CuCu flip-chip bonding was eventually completed. As a result, a shear strength of approximately 11.2 MPa could be achieved after the bonding for 5 min under a pressure of 10 MPa at 300 ℃ in air. Because that was a result of partial bonding by only about 50% of the pillars, it was anticipated that a shear strength of 20 MPa or more could easily be obtained if all the pillars were induced to bond through process optimization.
Porous Cu layer, Flip-chip bonding, Zn plating, Zn selective etching, Thermo-compression sinter-bonding
Department of Materials Science and Engineering, Kumoh National Institute of Technology, Gumi, Gyeongbuk 39177, Korea
Journal of the Microelectronics and Packaging Society, Vol. 30, No. , pp. 105-111.
Electronic devices have been evolved to be mechanically flexible that can be endured repetitive deformation. This evolution emphasizes the importance of long-term reliability in metal wiring connecting electronic components, especially under bending fatigue in compressed environments. This study investigated methods to enhance adhesion between copper (Cu) and polyimide (PI) substrates, aiming to improve the reliability of copper wiring under such conditions. We applied oxygen plasma treatment and introduced a chromium (Cr) adhesion layer to the polyimide substrate. Our findings revealed that these adhesion enhancement methods significantly affect compression fatigue behavior. Notably, the chromium adhesion layer, while showing weaker fatigue characteristics at 1.5% strain, demonstrated superior performance at 2.0% strain with no delamination, outperforming other methods. These results offer valuable insights for improving the reliability of flexible electronic devices, including reducing crack occurrence and enhancing fatigue resistance in their typical usage environments.
Flexible device, Reliability, Interface adhesion, Metal film, Polyimide
Amkor Technology, Inc., 2045 East Innovation Circle, Tempe, AZ 85284, USA
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 1-6.
The mobile device industry demands much higher levels of integration and lower costs coupled with a growing awareness of the complete system’s configuration. A subsystem module package is similar to a board-level circuit that integrates a system function in a package beyond a System-in-Package (SiP) design. It is an advanced IC packaging solution to enhance the PDN and achieve a smaller form factor. Unlike a system-level design with a decoupling capacitor, a subsystem module package system needs to redefine the role of the capacitor and its configuration for PDN performance. Specifically, the design of package’s form factor should include careful consideration of optimal PDN performance and the number of components, which need to define the decoupling capacitor’s value and the placement strategy for a low impedance profile with associated cost benefits. This paper will focus on both the static case that addresses the voltage (IR) drop and AC analysis in the frequency domain with three specific topics. First, it will highlight the role of simulation in the subsystem module design for the PDN. Second, it will compare the performance of double-sided component placement (DSCP) motherboards with the subsystem module package and then prove the advantage of the subsystem module package. Finally, it will introduce three-terminal decoupling capacitor (decap) configurations of capacitor size, count and value for the subsystem module package to determine the optimum performance and package density based on the cost-effective model.
SiP, Module Design, AP, PDN, ESR, Decap
Department of Materials Science and Engineering, University of Seoul, 163, Seoulsiripdae-ro, Dongdaemun-gu, Seoul 02504, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 7-16.
최근 자동차 산업은 친환경, 편리함, 안전성과 같은 키워드를 중심으로 기술 발전이 이뤄지면서 빠르게 변화하고 있다. 친환경에 대한 관심과 맞물려 그린 카(green car)가 이목을 끌고 사용자 편의를 위한 첨단 기술 및 기능을 갖춘 고성능 자동차가 시장에 출시되고 있다. 발전하는 차량 성능으로 인해서 이에 맞는 전장품의 개발 또한 필수적이다. 자동차용 전장품은 고온, 고습, 열충격, 진동, 오염 등 복합적인 환경에서 사용되기 때문에 여타 산업에 비해 높은 수준의 신뢰성 검증이 필요하다. 특히, 부품 내 접합부의 신뢰성을 확보하여 무리없이 기능을 수행하고 운전자의 안전을 보장하 는 것이 핵심이다. 따라서 저자는 차량 전장품의 최근 동향을 살펴보고 신뢰성을 향상시킬 수 있는 접합 방법으로 솔더 링, TLP 접합 및 소결접합을 소개하였다.
Recently, the automobile industry is rapidly changing due to technological development. Next-generation cars with high technology and new functions are on the market. It is essential to develop electronic devices to meet the condition of next-generation cars. In this study, the authors have reviewed recent trends of automotive electronics and packaging technology. Automotive electronics are used in harsh environments compared with other industries. Thus, it is important to improve the reliability of device junctions that directly affect electronics performance. Soldering, TLP (transient liquid phase bonding), and sintering are introduced for the bonding methods in car electronics.
car electronics, packaging, soldering, TLP bonding, sintering
School of Advanced Materials Engineering Jeonbuk National University, 567 Baekje-daero, Deokjin-gu, Jeonju 54896, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 17-34.
2011년 Naguib 그룹에서 처음 보고한 Ti3C2TX MXene은 우수한 친수성, 전기 전도성 및 기계적/화학적 안정성으로 인해 큰 주목을 받고 있다. 특히, MXene은 수 나노미터 두께를 지닌 2차원 물질이므로 유연성을 확보하기에 용이하기 때문에 스마트 센서, 에너지 하베스팅/저장 시스템, 수퍼커패시터 및 전자기 차폐 시스템 등 여러 분야에 적용하고자 한 연구 결과가 많이 보고되었다. 본 논문에서는 Ti3C2TX MXene의 다양한 합성 공정 및 특성에 대해 간략히 소개한 후, Ti3C2TX MXene을 유연 전극 물질로 이용한 최근 연구 결과를 알아보고자 한다.
Ti3C2TX MXene, first reported by Naguib et al. in 2011, has attracted tremendous attention due to its excellent hydrophilicity, electrical conductivity, and mechanical/chemical stability. Since MXene is a two-dimensional material with a thickness of few nanometers, which ensure its flexibility. In last few years, due to these properties many researchers used Ti3C2TX MXene into various fields such as flexible smart sensors, energy harvesting/storage devices, supercapacitors and electromagnetic interference shielding systems. In this review article, we have briefly discussed the various synthesis processes and characteristics of Ti3C2TX MXene. Moreover, we reviewed the latest development of Ti3C2TX MXene as flexible electrode material to be used into different applications.
Flexible, Ti3C2TX MXene, electrode, sensor, battery
Department of Materials Science and Engineering, University of Seoul, Seoul 130-743, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 35-41.
5G 시대를 맞아, 인공지능, 클라우드 컴퓨팅, 자율주행 차량, 스마트 제조 등의 기술 소요가 증가하고 있다. 전 자기기의 고효율을 위해 고집적회로 및 패키징 연구는 중요하다. 전해도금된 솔더는 범프 조성의 균일성에 한계가 있다. 작은 크기의 솔더 파우더로 구성된 솔더 페이스트는 고집적 패키징에 일반적으로 사용되는 솔더 중 하나이다. 솔더 페이스트에 나노 입자를 첨가하거나 기판 표면 마감 처리를 하여 젖음성을 향상시키고, 금속 패드 계면에서 금속간화합물의 성장을 억제하는 연구가 진행중이다. 본 논문은 나노 입자 첨가를 통한 솔더 페이스트의 젖음성 향상과 계면 금속간화합물의 성장을 억제하는 원리에 대하여 설명한다.
In the era of Fifth-Generation (5G), technology requirements such as Artificial Intelligence (AI), Cloud computing, automatic vehicles, and smart manufacturing are increasing. For high efficiency of electronic devices, research on high-intensity circuits and packaging for miniaturized electronic components is important. A solder paste which consists of small solder powders is one of common solder for high density packaging, whereas an electroplated solder has limitation of uniformity of bump composition. Researches are underway to improve wettability through the addition of nanoparticles into a solder paste or the surface finish of a substrate, and to suppress the formation of IMC growth at the metal pad interface. This paper describes the principles of improving the wettability of solder paste and suppressing interfacial IMC growth by addition of nanoparticles.
Sn-Ag-Cu solder paste, nano-composite solder, wettability, IMC growth
School of Advanced Materials Engineering, Dong-Eui University, 176 Eomgwangno, Busanjin-gu, Busan 47340, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 43-47.
본 연구에서는 보일러 등에 적용을 하기 위하여 물속에 담군 채 가열할 수 있는 친환경 박막형 히터에 대한 결과를 보고한다. 장수명을 확보하기 위하여 소재 안정성이 높은 Mo 박막(40 nm)을 마그네트론 스퍼터법을 이용하여 Glass 기판상에 증착하였으며 후속 공정 진행 시 Mo 박막의 부식을 방지하기 위하여 상부에 ZnO 박막 (60 nm)을 형성하였다. 이후 투명 접착성을 가지는 PVB (Polyvinyl Butyral)를 이용하여 ZnO 박막 상부에 또 다른 Glass기판을 올려두고 열풍건조기 내에서 150oC의 온도에서 2시간동안 PVB를 경화시키며 접착시켜 Glass/Mo/ZnO/Glass 구조의 수중 히터를 완성하였다. 이렇게 제작한 발열체를 수중에 담근 후 발열 시 물의 온도가 2분 내 50oC까지 상승되는 것을 확인하였으며 미미한 수준의 저항증가가 발생하며 구조적 안정성 또한 확보되었다. 인가 전압의 세기에 따라 발열체의 온도가 제어되기 때문에 보일러에 적용할 때 사용자가 설정하는 온도를 용이하게 제어할 수 있을 것이라 기대된다. 마지막으로, 본 연구에서 제작한 박막형 히터는 반투명의 특성을 가져 심미성을 부여할 수 있어 제품의 부가가치를 더욱 높일 수 있을 것으로 기대된다.
In this study, we demonstrated an eco-friendly thin-metallic-film-based heater which can be operated in water. Based on the materials stability, Mo was selected as the heating element to secure long-term stability. Using a magnetron sputtering, 40 nm-thick Mo layers were deposited onto a glass substrate, followed by the deposition of 60-nm-thick ZnO layer to prevent oxidation during the heater fabrication process. Then, PVB (Polyvinyl Butyral) was applied on top of ZnO layer and an additional glass substrate was placed, which were heated at 150oC for 2 hr. The PVB was cured with strong adhesion by the processing condition. We operated the Glass/Mo/ZnO/Glass heater in water, and it was shown that the water temperature reached 50oC within 2 minutes, with a minimal resistance change of the heater. Finally, the heaters exhibit a semi-transparency, and this aesthetic advantage is expected to contribute to the added value of the heater.
Thin films, conductive electrodes, corrosion resistance, Joule heating
Department of Materials Science and Engineering, Dong-A University, Saha-Gu, Busan 49315, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 49-54.
반도체 Si 웨이퍼 Cu 배선을 제작하는데 사용하는 submicron 크기의 다마신 패턴의 구리 도금공정을 동일한 조건의 유기첨가제 및 전류밀도 조건을 사용하여 PCB 금속배선에 사용되는 수십 micron 크기의 패턴 도금에 적용하였다. PCB 패턴의 종횡비가 작아 쉽게 채워질 것으로 기대했던 것과는 달리, 이 경우 패턴 내부에 위치별 도금 두께 불균일도가 심화되는 것이 관찰되었다. 이러한 원인을 정량적으로 분석하기 위해 유동 및 전기장을 고려한 전기화학적 해석을 진행하였으며, 이를 통해 패턴 바닥부 코너에서 측벽과 바닥부의 도금에 의한 용액내 Cu2+ 이온의 고갈이 상대적으로 패턴 상부보다 빠르게 일어나는 것이 확인되었다. 이는 Cu2+ 이온의 확산계수가 2.65 10-10 m2/s 로 초당 16.3 μm정도의 평균 이동거리를 가짐으로, 이 값이 다마신 패턴에서는 충분히 커서 원활하게 패턴 내부까지 이온 공급이 이루어지나, 수십 micron 크기를 갖는 PCB 크기에서는 소진된 구리이온을 보충해 주기 위해 충분한 시간이 필요하기 때문인 것으로 확인되었다. 구리 이온을 충분히 공급해 주기 위해 전류밀도를 낮춰 Cu2+ 이온이 확산할 수 있는 충분한 시간을 할애해 줌으로써 두께 균일도가 향상되는 것을 알 수 있었다.
The copper plating process used to fabricate the submicron damascene pattern of Cu wiring for Si wafer was applied to the plating of a PCB pattern of several tens of microns in size using the same organic additives and current density conditions. In this case, the non-uniformity of the plating thickness inside the pattern was observed. In order to quantitatively analyze the cause, a numerical calculation considering the solution flow and electric field was carried out. The calculation confirmed that the depletion of Cu2+ ions in the solution occurred relatively earlier at the bottom corner than the upper part of the pattern due to the plating of the sidewall and the bottom at the corner of the pattern bottom. The diffusion coefficient of Cu2+ ions is 2.65 10-10 m2/s, which means that Cu2+ ions move at 16.3 μm per second on average. In the cases of small damascene patterns, the velocity of Cu2+ ions is high enough to supply sufficient ions to the inside of the patterns, while sufficient time is required to replenish the exhausted copper ions in the case of a PCB pattern having a size of several tens of microns. Therefore, it is found that the thickness uniformity can be improved by reducing the current density to supply sufficient copper ions to the target area.
electroplating, copper, organic additive, numerical calculation
1Department of Cogno mechatronics Engineering, Pusan National University 2Department of Opto-Mechatronics Engineering, Pusan National University
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 55-59.
본 논문에서는 플라즈몬 공명 현상을 통하여 나노 입자 주변의 전기장을 증폭시키며, 흡광률을 높일 수 있는 구조를 시간영역 유한차분(FDTD)시뮬레이션을 이용하여 나노입자를 평면에 배열하였을 때와 비교하여 나노 구조에 배열하였을 때의 전기장과 흡광도를 비교하였다. 또한 나노구조의 폭을 240 nm ~ 300 nm로 조절하여 입자간의 간격이 좁을수록 광 흡수율이 높음을 보이고자 하였다. 또한 UV 임프린트를 통하여 나노 입자와 나노 구조를 표면에 함께 형성시키는 방법에 대한 연구를 진행하였다. 해당 구조에 입자를 형성하기 위하여 스프레이 코팅을 이용하여 나노 입자를 구조 제작에 사용되는 몰드에 먼저 배열한 후, UV 임프린팅을 통해 제작하였고 나노구조와 입자가 함께 형성됨을 Scanning Electron Microscopy 로 확인하였다.
In this paper, we compared the electric field and absorptance of nano particles in nanostructures by amplifying the electric field around the nanoparticles through plasmon resonance and comparing the structure that can increase the absorptance with the nanostructure by using the Finite Different Time Domain (FDTD) simulation. In addition, the width of the nanostructure was adjusted to 240 nm ~ 300 nm, and the light absorptance rate was higher as the gap between the particles was short. In addition, a study was conducted on the formation of nanoparticles and nanostructures on the surface through UV imprint. In order to form particles in the structure, the nano particles were first arranged in the mold used for the fabrication of the structure using spray coating, and then fabricated through UV imprinting. The nanostructure and particles were formed together by scanning electron microscopy.
simulation, plasmonic coupling, nanostructure, nanoparticle, nano imprint
1School of Chemical Engineering, Chonnam National University, Gwangju 61186, Korea, 2Haeyang Energy Co, Gwangju 62209, Korea, 3Department of Environmental System Engineering, Chonnam National University, 50 Daehak-ro, Yeosu, Jeonnam 59626, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 61-66.
이 연구는 원자층 증착(Atomic Layer Deposition, ALD) 기술을 사용하여 나노미터 크기의 금속 촉매 물질을 연료극 층에 코팅하여 표면적을 늘리고 촉매의 효과를 극대화시키기 위한 연구이다. ALD 공정은 기판 위에 원자 수준에서 잘 제어된 두께를 갖는 균일한 막을 제조하는 것으로 알려져 있다. 우리는 고체산화물 연료전지의 연료극 물질로 가장 널리 알려진 Ni/YSZ 위에 금속(Ni)을 코팅하여 성능을 측정하였다. ALD 코팅은 3 nm 이상의 코팅에서 전지 성능의 감소를 보이기 시작했다
This study is to increase the surface area and maximize the effect of the catalyst by coating a nanometersized metal catalyst material on the anode layer using atomic layer deposition (ALD) technology. ALD process is known to produce uniform films with well-controlled thickness at the atomic level on substrates. We measured the performance by coating metals (Ni) on Ni/YSZ, which is the most widely known anode material for solid oxide fuel cells. ALD coatings began to show a decrease in cell performance over 3 nm coatings.
Solid Oxide Fuel Cell (SOFC), Atomic Layer Deposition (ALD), Alternative Anode
Department of Biological and Chemical Engineering, Seoyeong University, 1 Seogang-ro, Buk-gu, Gwangju 61268, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 67-70.
본 연구는 최근 유행하고 있는 코로나 바이러스(SARS-CoV-2) UV 살균을 위한 1차원 광자 준결정 구조 개념 의 광학 필터를 설계하고 시뮬레이션 하였다. 시뮬레이터는 수치해석 프로그램으로 사용되는 MATLAB 프로그램과 직 접 코딩한 연산수식을 사용하였다. 비주기(복합구조) 다중층 구조 모델을 설계한 후, 특성 계산을 위하여 다중층 구조 모 델의 물성치를 천이 행렬법(TMM, Transfer Matrix Method)으로 설정하였다. 설계된 복합 다중층 구조의 MATLAB을 활 용한 전산모사법을 통하여 얻은 행렬값으로부터 반사도와 투과도를 계산하였다. 이 연구의 결과로 인체에 무해하면서 코 로나 바이러스 UV 살균이 가능한 253.7 nm 파장만을 투과하는 광학 필터의 제작 및 응용 가능성을 증명하였다.
In the present work, we have designed to optimize the optical filter structures of the 1-dimensional photonic quasicrystals (1D PQCs) characteristic for the COVID-19 UV sterilization. The simulator using MATLAB program and ourselves manufacturing calculation codes. After making the aperiodic (and complexed) multi-layer structure model, we establish the transfer matrix method (TMM) for model by the operator conversion. By the using the MATLAB, we derive a matrix for the designed complexed multi-layer structure by applying the equations to the model by obtaining the reflectance and transmittance from the matrix. We also prove the possibility of application in optical filter for UV sterilization.
COVID-19 UV sterilization, Photonic Quasicrystal, 1D PQCs, Aperiodic multilayer, Optical filter
1Energy Convergence Core-Facility, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea 2School of Chemical Engineer, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 71-75.
Graphene oxide를 ZnCl2:NaCl 전해질과 함께 교반한 후 순환 전압전류법에 의해 전기화학적으로 제막하여 유기태양전지용 전자수송층 제막과정을 단순화하고 이를 갖는 유기태양전지를 제작하였다. 소자의 구조는 FTO/ZnO:graphene 전자수송층/P3HT:PCBM 광활성층/PEDOT:PSS 정공수송층/Ag이다. ETL의 형태 및 화학적 특성은 주사 전자현미경(scanning electron microscopy, SEM), X선 광전자 분광법(X-ray photoelectron spectroscopy, XPS), 라만 분광법으로 확인하였다. XPS 측정결과 ZnO 금속산화물 및 탄소결합이 동시에 확인되었고, 라만 분광법에서 ZnO와 graphene 피크를 확인하였다. 제작한 태양전지의 전기적 특성을 솔라시뮬레이터로 측정하였고 0.05 V/s의 속도로 2회 제막한 ETL 소자에서 1.94%의 가장 높은 광전변환효율을 나타내었다.
Graphene oxide was stirred with a ZnCl2:NaCl electrolyte and electrochemically coated by cyclic voltammetry to simplify the electron transpfer layer film forming process for organic solar cells and to fabricate an organic solar cell having it. The device structure is FTO/ZnO:graphene/P3HT:PCBM/PEDOT:PSS/Ag. Morphology and chemical properties of ETL were confirmed by scanning electron microscopy(SEM), X-ray photoelectron spectroscopy (XPS), and Raman spectroscopy. As a result of XPS measurement, ZnO metal oxide and carbon bonding were simultaneously confirmed, and ZnO and graphene peaks were confirmed by Raman spectroscopy. The electrical characteristics of the manufactured solar cell were specified with a solar simulator, and the ETL device coated twice at a rate of 0.05 V/s showed the highest photoelectric conversion efficiency of 1.94%.
electron transfer layer, co-deposition, cyclic voltammetry, organic solar cell, photoelectric conversion efficiency
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 77-79.
Department of Advanced Materials Engineering, Chungbuk National University, Chungdae-ro, Seowon-gu, Cheongju, Chungbuk 28644, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 1-10.
최근 반도체 소자는 모바일 전자제품과 wearable 및 flexible한 소자와 기판의 다양한 활용으로 많은 분야에서 폭넓게 사용되고 있다. 이들 반도체 칩 접합 공정 중 기판과 솔더의 열팽창 계수(CTE)의 차이와 기판 및 부품 전체에 인 가되는 과도한 열 영향은 소자의 성능 및 신뢰성에 영향을 주며, 최종적으로 휨(warpage) 현상 및 장기 신뢰성 저하 등을 초래한다. 이러한 문제점을 개선하기 위해 저온에서 공정이 가능한 저융점 솔더에 대한 연구가 활발히 진행되고 있다. Sn-Bi, Sn-In 등 다양한 저융점 솔더 합금 중 Sn-Bi 솔더는 높은 항복 강도, 적절한 기계적 특성 및 저렴한 가격 등의 이 점이 있어 유망한 저온 솔더로 각광받고 있다. 그러나 Bi의 높은 취성 특성 등 단점으로 인해 솔더 합금의 개선이 필요하 다. 본 review 논문에서는 다양한 미량 원소와 입자를 첨가하여 Sn-Bi 소재의 기계적 특성 개선을 위한 연구 동향을 소 개하며 이를 비교 분석하였다.
Recently, semiconductor devices have been used in many fields owing to various applications of mobile electronics, wearable and flexible devices and substrates. During the semiconductor chip bonding process, the mismatch of coefficient o f thermal expansion (CTE) between the substrate and the solder, and the excessive heat applied to the entire substrate and components affect the performance and reliability of the device. These problems can cause warpage and deterioration of long-term reliability of the electronic packages. In order to improve these issues, many studies on low-melting temperature solders, which is capable of performing a low-temperature process, have been actively conducted. Among the various low-melting temperature solders, such as Sn-Bi and Sn-In, Sn-58Bi solder is attracting attention as a promising low-temperature solder because of its advantages such as high yield strength, moderate mechanical property, and low cost. However, due to the high brittleness of Bi, improvement of the Sn-Bi solder is needed. In this review paper, recent research trends to improve the mechanical properties of Sn-Bi solder by adding trace elements or particles were introduced and compared.
Sn-58Bi solder, Mechanical properties, Low-melting temperature, Intermetallic compound, Flexible substrates
Dept. of Welding & Joining Science Engineering, Chosun University, 309 Pilmoon-daero, Dong-gu, Gwangju 61452, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 11-18.
최근 세계적으로 유연 전자소자 관련 기술들이 주목을 받으면서 유연소자 제작 과정에서의 성형성 및 굽힘 상 태에서의 성능과 내구성 등의 문제점을 개선하기 위하여 액체 금속을 사용한 배선·접합 기술들의 개발이 요구되고 있 다. 이러한 요구에 부응하여 독성이 없으면서 낮은 점도와 우수한 전기전도도를 가지는 갈륨 및 갈륨계 합금 (공정 갈륨 -인듐 및 공정 갈륨-인듐-주석 등)의 액체금속을 저온 접합소재로 이용하려는 다양한 연구들이 이루어지고 있다. 본 논문 에서는 갈륨 및 갈륨계 합금을 이용한 저온접합 기술의 최신 연구동향을 정리하여 소개하고자 한다. 이러한 기술들은 향 후 유연 전자소자의 제조 및 전자패키지에서의 저온접합 등의 분야에서 실용화를 위한 중요한 기반기술이 될 것으로 예 상된다.
Recently, as flexible electronic device-related technologies have received worldwide attention, the development of wiring and bonding technologies using liquid metals is required in order to improve problems such as formability in the manufacturing process of flexible devices and performance and durability in the bending state. In response to these needs, various studies are being conducted to use gallium and gallium-based alloys (eutectic Ga-In and eutectic Ga-In-Sn, etc.) liquid metals, with low viscosity and excellent electrical conductivity without toxicity, as lowtemperature bonding materials. In this paper, the latest research trends of low-temperature bonding technology using gallium and gallium-based alloys are summarized and introduced. These technologies are expected to become important base technologies for practical use in the fields of manufacturing flexible electronic devices and low-temperature bonding in microelectronic packages in the future.
flexible electronics, gallium, liquid metal, packaging, soldering
1Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 2Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 19-31.
최근 거대 데이터 기반의 미래 기술이 발전함에 따라 전자 소자의 고성능 및 고집적화 추세가 지속되고 있는 데, 이는 심각한 발열 문제를 수반하여 소자의 신뢰성을 위협하는 주요 요인으로 작용하고 있다. 효과적인 열관리 대책을 수립하기 위해서는 소자의 구동 환경에서 온도 분포를 정확히 평가하고 방열 경로를 설계하는 것이 필요하다. 본 논문에 서는 소자의 온도 분포를 비접촉 방식의 높은 공간 및 시간 분해능으로 관찰할 수 있는 열반사 현미경 기술을 소개한다. 구체적으로 열반사 현미경의 원리 및 구동 형태를 알아보고, 온도, 공간, 시간 분해능 향상을 위한 최신 연구 동향과 다 양한 전자 소자의 온도 및 열적 특성 분석에 적용된 사례를 함께 살펴본다.
With the advent of technologies based on big data, the trend of electronics towards high performance and high integration density continues. However, this development of electronics suffers from overheating issues, which seriously threaten the reliability of the devices. To develop effective strategies for thermal management, it is crucial to accurately evaluate the temperature distribution and design the heat dissipation path within the device in the operating condition. This paper introduces thermoreflectance microscopy that can observe the temperature distribution of a device with high spatial and temporal resolutions in a non-contact way. Specifically, the working principle and various forms of thermoreflectance microscopy are presented along with the latest research trends to improve the temperature, space, and time resolutions. We further review several examples in which thermoreflectance microscopy is applied to investigate the temperature and thermal characteristics of electronic devices.
Flexible, Ti3C2TX MXene, electrode, sensor, battery
1Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 2Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 33-41.
최근 플렉시블 전자소자의 안정적인 전기적 연결을 위한 유연전도성 접합 기술의 연구 필요성이 대두되고 있 다. 기존의 금속 납땜 접합에서 발생하는 기계적 파손 문제는 탄성 계수가 작거나 두께가 얇은 재료를 기반으로 제작된 유연전도성 접합을 통해 해결할 수 있다. 기계적 특성을 향상시키는 동시에 안정적인 전기적 연결이 가능하도록 높은 전 기전도도를 가진 물질을 박막화하거나, 작은 탄성 계수를 가진 물질에 혼합하는 방식 등으로 형성된다. 대표적인 유연전 도성 접합 기술로는 박막 증착을 통한 유연전도성 접합, 유연 전도성 접착제 기반 접합, 그리고 액체 금속 기반의 전도성 접합 형성 방법 등이 있으며 본 논문에서는 각 방법들의 기계적/전기적 특성 향상 전략과 그 쓰임을 소개한다.
Recent necessities of research have emerged about soft interconnection technologies for stable electric connections in flexible electronics. Mechanical failure in conventional metal solder interconnection can be solved as soft interconnections based on a small elastic modulus and a thin thickness. To enable stable electric connection while improving mechanical properties, highly conductive materials be thinned or mixed with a material that has a small elastic modulus. Representative soft interconnection technologies such as thin-film metallization, flexible conductive adhesives, and liquid metal interconnections are presented in this paper, and be focused on mechanical/electric properties improving strategies and their applications.
Soft interconnections, Flexible electronics, Thin-film metallization, Flexible conductive adhesives, Liquid metal interconnections
1STATS ChipPAC Korea LTD., 191, Jayumuyeok-ro, Jung-gu, Incheon, 22379, Korea, 2VITZROTECH Co., Ltd., 327, Byeolmang-ro, Danwon-gu, Ansan-si, Gyeonggi-do, 15603, Korea, 3DMC Convergence Research Department, Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea, 4School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 43-48.
인쇄전자소자의 금속배선 적용을 위해 스크린 프린팅 Ag/폴리이미드(polyimide, PI) 사이의 계면접착력을 85oC/85% 상대습도의 고온/고습 처리 시간에 따라 PI 필링을 통한 90o 필 테스트로 평가하였다. 고온/고습 처리 전 필 강 도는 약 25.99±1.47 gf/mm이었고, 500시간 동안 고온/고습 처리 후 필 강도는 6.05±0.54 gf/mm까지 지속적으로 감소하 였다. 박리 파면에 대해 X-선 광전자 분광법 분석 결과, 이는 Ag/PI 계면으로 수분이 지속적으로 침투하여 계면 근처 PI 일부가 가수분해되어 weak boundary layer를 형성하기 때문이고, 이로 인해 고온/고습 처리 전 Ag/PI 계면 박리모드가 고온/고습 처리 후 계면 근처 PI의 얕은 내부 박리 모드로 변경된 것으로 판단된다.
Effect of temperature/humidity (T/H) treatment conditions on the peel strength of screen-printed Ag/polyimide (PI) structures was evaluated by peeling PI films in 90o peel test. Initial peel strength was 25.99±1.47 gf/mm, and then decreased to 6.05±0.54 gf/mm after 500 h at 85oC/85% relative humidity T/H condition. And, the peeled locus was changed from Ag/PI interface to shallow cohesive inside PI near interface. X-ray photoelectron spectroscopy analysis on the peeled surfaces showed that the long-term moisture penetration into the Ag/PI interface during T/H treatment led to hydrolytic degradation of PI to form weak boundary layer inside PI near Ag/PI interface, which are responsible for large decrease in peel strength.
Flexible printed circuit board, Peel test, Temperature/humidity, Screen-printed Ag, Polyimide
PKG Development, SK Hynix Co., 2091, Gyeongchung-daero, Bubal-eup, Icheon-si, Gyeonggi-do, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 49-52.
Flip Chip 제품 난이도 증가에 따라 신뢰성 관점에서 안정적인 Package (이하 PKG) 소재 기술에 대한 관심이 점차 높아지는 추세이다. 현재 flip chip PKG의 주요 신뢰성 불량은 Sn bridge와 Cu 확산 이다. 위 2가지 형태 모두 본질 적으로는 bump 주변 잔류한 flux residue에 의하여 발생한 미세 공극이 유발하는 불량이다. 이러한 형태의 신뢰성 불량 발생 문제점을 최소화하기 위해 Molded Under-Fill (이하 MUF) 소재의 핵심 조성과 flux 간 상관 관계를 검토하였다. 금 번 연구를 통하여 MUF 소재의 main 구성 요소인 base resin, filler와 flux에 대한 상관 관계를 정의 하였으며, 이러한 lesson learn을 토대로 flux immunity가 개선된 MUF 소재 조성을 설계할 수 있었다. 현재 해당 소재 조성으로 흡습 신뢰 성 85%/85%/24hrs 확보와 파괴 분석으로 bump 주변 미세 공극의 미 발생을 확인 하였다. 본 연구 결과는 양산 단계에 서의 flip chip 공정 수율 향상과 MUF와 flux 간 상용성 연구에 대한 이해를 돕는데 기여할 것으로 예상된다.
As the difficulty of flip chip products increase, interest in stable PKG material technology from the viewpoint of reliability is increasing. Currently, the representative of poor reliability that are mainly occurring in flip chip PKG are Sn bridge and Cu dendrite. Two type defects are caused by void generated by the flux residue around the bump. In order to essentially minimize the risk of this type of reliability failure, the linkage between the composition of Molded Underfill (MUF) and flux, which is related material, was reviewed. In this study, the correlation between base resin and filler, which is the main component of MUF, and flux, was defined, and the material composition design was carried out by refer to lesson learn. With the current material composition, it was confirmed that moisture absorption reliability 85%/ 85%/24hrs pass result and void did not occur during destructive analysis, and developed MUF has shown flux immunity improving result in flip Chip PKG. We think this study can be used in yield enhancement of flip chip process and give insights to study in compatibility between MUF and flux.
Flip chip, MUF, Flux, Residue, Base resin, Filler, Delamination
Department of Materials Science and Engineering, Yonsei University, Seoul 03722, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 53-58.
One of the most promising emerging technologies for the next generation of nonvolatile memory devices based on resistive switching (RS) is the resistive random-access memory mechanism. To date, RS effects have been found in many transition metal oxides. However, no clear evidence has been reported that ZnO-based resistive transition mechanisms could be associated with strong correlation effects. Here, we investigated N, F-co-doped ZnO (NFZO), which shows bipolar RS. Conducting micro spectroscopic studies on exposed surfaces helps tracking the behavioral change in systematic electronic structural changes during low and high resistance condition of the material. The significant difference in electronic conductivity was observed to attribute to the field-induced oxygen vacancy that causes the metal-insulator Mott transition on the surface. In this study, we showed the strong correlation effects that can be explored and incorporated in the field of multifunctional oxide electrons devices.
RRAM, atomic layer deposition, co-doping, oxygen vacancy, Mott-transition
1STATS ChipPAC Korea LTD., 191, Jayumuyeok-ro, Jung-gu, Incheon, 22379, Korea, 2VITZROTECH Co., Ltd., 327, Byeolmang-ro, Danwon-gu, Ansan-si, Gyeonggi-do, 15603, Korea, 3DMC Convergence Research Department, Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea, 4School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 59-64.
연성인쇄회로기판에 사용되는 스크린 프린팅(screen-printing, SP) Ag/폴리이미드(polyimide, PI) 구조의 필 테 스트 시 필링 속도 및 박막 적층 구조가 필 강도에 미치는 영향을 분석하기 위해, PI/SP-Ag, PI/SP-Ag/전해도금 Cu, 전 해도금 Cu/SP-Ag/PI의 3가지 적층 구조에 대해 필링 속도에 따른 90o 필 테스트를 수행하였다. PI 박막을 필링하는 2가 지 구조에서는 필링 속도에 상관없이 필 강도가 거의 일정하게 유지된 반면, Cu/Ag 금속 박막 필링 구조에서는 필링 속 도가 증가할수록 필 강도가 크게 증가하는 경향을 보였다. 이는 필링 속도에 따른 90o 굽힘 소재의 소성변형에너지 차이 에 기인한 것으로 판단된다. 인장속도에 따른 인장 시험 결과, 변형 속도 증가에 따른 Cu/Ag 금속 박막의 유동응력 및 인 성 증가가 Cu/Ag/PI 구조에서의 필링 속도에 따른 금속 박막의 90o 굽힘 소성변형에너지 및 필 강도 증가의 주 원인으로 판단된다. 반면, 점탄성 소재인 PI의 경우 변형 속도에 따른 기계적물성 차이가 금속에 비해 상대적으로 작아서, PI/Ag 및 PI/Ag/Cu 구조에서는 필링 속도에 따른 PI의 90o 굽힘 소성변형에너지 및 필 강도 변화가 상대적으로 적은 것으로 판 단된다.
Effects of film stack structure and peeling rate on the peel strength of screen-printed (SP) Ag/polyimide (PI) systems were investigated by a 90o peel test. When PI film was peeled at PI/SP-Ag and PI/SP-Ag/electroplated (EP) Cu structures, the peel strength was nearly constant regardless of the peeling rate. When EP Cu was peeled at EP Cu/SPAg/ PI structure, the peel strength continuously increased as peeling rate increased. Considering uniaxial tensile test results of EP Cu/SP-Ag film with respect to loading rate, the increase of 90o plastic bending energy and peel strength was attributed to increased flow stress and toughness. On the other hand, viscoelastic PI film showed little variation of flow stress and toughness with respect to loading rate, which was assumed to result in nearly constant 90o plastic bending energy and peel strength.
Printer electronics, peel test, screen-printed Ag, polyimide, peeling rate
PKG Development, SK Hynix Inc., 2091, Gyeongchung-daero, Bubal-eup, Icheon-si, Gyeonggi-do, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 65-71.
Mobile PKG Trend는 소형화와 더불어 고용량 제품 요구로 인해 Mold Top Margin 감소가 불가피한 상황이 다. 하지만 기존 Laser Marking 공법은 Depth가 깊어 Narrow Top Margin 제품에 적용할 때 중첩 가공에 의한 PKG 강 도 저하가 예상되며, Chip Damage와 같은 품질 불량으로 신뢰성이 저하되는 문제점이 있다. 따라서 본 연구에서는 Laser Source 특징 비교를 통해 Narrow Top Margin 제품에 대응할 수 있는 Low Depth Laser Marking 기술을 확보하였으며, PKG 개발 제품에 해당 기술을 적용하여 평가한 결과 Marking Depth 67% 감소와 PKG 강도 12%가 향상됨을 검증하였 다. 또한 PKG Mechanical 분석을 통해 발생 가능한 Laser Damage 품질 검증을 진행하였고, Chip Damage(Crack/ Chipping) 불량은 발견되지 않았다. 이를 통해 양산 적용 품질 안정성을 확보하였다.
In the case of Mobile PKG Trend is in a situation where a decrease in Mold Top Margin is inevitable due to its miniaturization and high capacity product requirements. However, conventional laser marking technology has an average depth of deep, and when applied to narrow top margin products, PKG strength is expected to decrease due to overlapping processing, and reliability is reduced due to poor quality such as chip damage due to laser exposure. Therefore, we have secured the technology through research on low-depth laser marking solutions that can accommodate narrow top margin products. As a result of the evaluation of applicable technology application for PKG development products, it was verified that the marking depth decreased by 67% reduced and the PKG strength increased by 12%. Furthermore, the quality verification of Laser Damage that can occur through PKG Mechanical analysis was performed, and no Chip Damage defects were found. This ensured the stability of mass production application quality.
PKG, Laser Marking, Low Depth, Chip Damage
Dept. of Welding & Joining Science Engineering, Chosun University, 309 Pilmoon-daero, Dong-gu, Gwangju 61452, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 73-79.
본 연구에서는 최근 저온접합 소재로 각광받고 있는 Ga과 대표적인 전극 물질인 Cu와의 반응연구를 실시하 여 저온 솔더링 적용시 필요한 정보들을 확인하고자 하였다. 80-200oC 온도범위에서 Ga과 Cu/Au 기판을 반응시켜 계면 반응 및 금속간화합물(IMC) 성장을 관찰하고 분석하였다. 반응계면에서 성장하는 주요한 IMC는 CuGa2 상이었으며 그 상부에는 작은 입자크기를 가지는 AuGa2 IMC 그리고 하부에는 얇은 띠 형상의 Cu9Ga4 IMC가 형성되었다. CuGa2 입 자들은 scallop 형상을 보이며 Cu6Sn5 성장의 경우와 비슷하게 반응시간이 증가함에 따라서 큰 형상변화없이 입자 크기 가 증가하였다. CuGa2 성장기구를 분석한 결과 120-200oC 온도범위에서 시간지수는 약 3.0으로 산출되었고, 활성화에너 지는 17.7 kJ/mol로 측정되었다.
In this study, a reaction study between Ga, which has recently been spotlighted as a low-temperature bonding material, and Cu, a representative electrode material, was conducted to investigate information necessary for lowtemperature soldering applications. Interfacial reaction and intermetallic compound (IMC) growth were observed and analyzed by reacting Ga and Cu/Au substrates in the temperature range of 80-200oC. The main IMC growing at the reaction interface was CuGa2 phase, and AuGa2 IMC with small particle sizes was formed on the upper part and Cu9Ga4 IMC with a thin band shape on the lower part of the CuGa2 layer. CuGa2 particles showed a scallop shape, and the particle size increased without significant shape change as the reaction time increased, similar to the case of Cu6Sn5 growth. As a result of analyzing the CuGa2 growth mechanism, the time exponent was calculated to be ~3.0 in the temperature range of 120-200oC, and the activation energy was measured to be 17.7 kJ/mol.
liquid metal, gallium, intermetallic compound, interfacial reaction
1School of Materials Science and Engineering, Andong National University, 1375 Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea, 2JCET STATS ChipPAC Korea LTD., 299, Jayumuyeok-ro, Jung-gu, Incheon, 22379, Korea, 3DMC Convergence Research Department, Electronics and Telecommunications Research Institute, 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 81-89.
비전도성 필름(non-conductive film, NCF)의 적용이 Cu/Ni/Sn-2.5Ag 미세범프의 금속간화합물(intermetallic compound, IMC) 성장 거동에 미치는 영향을 분석하기 위해 110, 130, 150oC의 온도 조건과 1.3105 A/cm2의 전류밀도 조건에서 실시간 열처리 및 electromigration(EM) 실험을 진행하였다. 그 결과, NCF 적용 유무와 열처리 및 EM 실험과 관계없이 Ni3Sn4 IMC 성장에 필요한 활성화에너지는 약 0.52 eV로 큰 차이는 보이지 않았다. 이는 Ni-Sn IMC의 성장 속도가 Cu-Sn IMC 성장 속도보다 매우 느리며, 또한 Ni-Sn IMC의 성장 거동은 시간의 제곱근에 선형적으로 증가하므 로 확산이 지배하는 동일한 반응기구를 가지며 NCF 적용에 따른 역응력(back stress)의 EM 억제 효과가 크지 않기 때문 에 Ni3Sn4 IMC 성장에 필요한 활성화에너지는 차이가 나지 않는 것으로 판단된다.
The in-situ electromigration(EM) and annealing test were performed at 110, 130, and 150oC with a current density of 1.3105 A/cm2 conditions to investigate the effect of non-conductive film (NCF) on growth kinetics of intermetallic compound (IMC) in Cu/Ni/Sn-2.5Ag microbump. As a result, the activation energy of the Ni3Sn4 IMC growth in the annealing and EM conditions according to the NCF application was about 0.52 eV, and there was no significant difference. This is because the growth rate of Ni-Sn IMC is much slower than that of Cu-Sn IMC, and the growth behavior of Ni-Sn IMC increases linearly with the square root of time, so it has the same reaction mechanism dominated by diffusion. In addition, there is no difference in the activation energy of the Ni3Sn4 IMC growth because the EM resistance effect of the back stress according to the NCF application is not large.
Non-conductive film, Electromigration, Intermetallic Compound, Activation energy, Microbump
1Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology, 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea, 2Department of Materials Science & Engineering, Hanyang University, 222, Wangsimni-ro, Seongdong-gu, Seoul 04763, Korea, 3Department of Materials Science & Engineering, Tech University of Korea, 237, Sangidaehak-ro, Siheung-si, Gyeonggi-do 15073, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 91-97.
본 연구에서는 솔더 분말 크기에 따른 솔더페이스트의 젖음성 및 레올로지 특성을 평가하였다. 솔더페이스트 는 T4 (20~28 m), T5 (15~25 m), T6 (5~15 m) 3종류의 Sn-Ag-Cu 합금 분말을 사용하였고, 플럭스와 진공에서 혼 합하여 솔더페이스트를 제조하였다. 스파이럴 점도계로 10 rpm의 속도로 측정했을 때 T4, T5, T6 솔더페이스트의 점도 는 각각 155, 263, 418 Pa·s의 점도를 보이며, 분말크기가 감소함에 따라 점도는 증가되는 것이 관찰되었다. 또한, 솔더 페이스트의 경시변화에 따른 점도변화를 관찰하였으며, 7일 후 T4 솔더페이스트의 경우 점도가 2.6% 증가하여 거의 변 화가 없었으나, T5는 20.6%의 증가를 보였으며, T6의 경우 점도 증가가 매우 높아 스파이럴 점도계로는 측정이 불가하 였다. 분말 크기에 따른 솔더페이스트 점도 특성은 솔더의 인쇄성에 큰 영향을 주었다. T4 솔더페이스트의 경우 인쇄특 성 및 슬럼프와 브릿징 특성이 우수하였지만, 분말 크기가 작은 T5의 경우 인쇄성이 다소 떨어졌으며, T6의 경우 점도가 높아 솔더페이스트가 마스크 개구홀의 벽에 붙고, 따라서 인쇄성이 매우 떨어지는 모습을 보였다. 솔더링을 진행할 경우 , T6 솔더페이스트는 디웨팅(dewetting)이 발생하여 젖음성도 T4, T5에 비해 낮은 것이 관찰되었다.
The wettability and rheological properties of solder paste with the size of the solder powder were evaluated. To formulate the solder paste, three types of solder powder were used: T4 (20~28 μm), T5 (15~25 μm), and T6 (5~15 μm). The viscosities of the T4, T5, and T6 solder pastes at 10 RPM were 155, 263, and 418 Pa·s, respectively. After 7 days, the viscosity of the T4 solder paste slightly increased by 2.6% and that of T5 was increased by 20.6%. The viscosity of the T6 solder paste after 7 days could not be measured due to high viscosity. The viscosity variation with solder particle size also affected on the printability of the solder. In the case of the T4 solder paste, printability, slump, bridging, and soldering properties were excellent. On the other hand, T5 showed slight dewetting and solder ball defects. Especially, T6, which the smallest powder size, showed poor printability and dewetting at the edge of solder.
fine pitch, solder paste, rheology, flux, viscosity, printability, wettability
1Department of Nanotechnology Engineering, Pukyong National University, 2Department of Materials Science and Engineering, Seoul National University of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 107-112.
본 연구에서는 용제를 전혀 사용하지않고 UV경화가 가능한 실버 페이스트를 개발하였다. 무용제(solvent-free) 타입으로 개발한 실버 페이스트의 점도 및 점탄성 측정하였다. 그리고 스크린인쇄로 패턴을 인쇄한 후에 UV경화로 전극 도막을 형성시켰다. 형성된 전극도막의 전도성, 연필경도, 접착력에 대해서 평가하였다. 마지막으로 전극도막의 경화특성 은 TGA 및 FT-IR로 평가하였다. 이러한 결과를 정리하면 전도성, 접착력, 경화특성에 대해서는 Paste(4), 즉 1.2 m의 구형 실버 파우더와 50 nm 실버 파우더를 72:8%로 혼합한 실버 페이스트가 가장 우수한 물성이 얻어짐을 알 수 있었다.
In this study, a silver paste capable of UV curing without using any solvent was developed. The viscosity and viscoelasticity of the silver paste developed as a solvent-free type were measured. And after printing the pattern by screen printing, an electrode coating film was formed by UV curing. Conductivity, pencil hardness, and adhesive force of the formed electrode coating film were evaluated. Finally, the curing characteristics of the electrode coating film were evaluated by TGA and FT-IR. Summarizing these results, in terms of conductivity, adhesion, and curing characteristics, it was found that Paste (4), that is, silver paste obtained by mixing 1.2 m spherical silver powder and 50 nm silver powder at 72:8% had the best physical properties.
Silver paste, UV-curing, Solvent-free, Conductivity, Adhesive
1Micro-Joining Center, Joining R&D Group, Korea Institute of Industrial Technology, Incheon 21999, Korea, 2School of Materials Science and Engineering, Andong National University, Andong 36729, Korea, 3Display and Nanosystem Laboratory, School of Electrical Engineering, Korea University, Seoul 02841, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 113-119.
플렉서블, 웨어러블 디바이스 등을 포함한 차세대 전자 기기의 기계적 신뢰성 향상을 위하여 다양한 유연 접 합부에서 높은 수준의 기계적 신뢰성이 요구되고 있다. 기존 고분자 기판 접합을 위한 에폭시 등의 유기 접착소재는 접 합부 두께 증가가 필연적이며, 반복 변형, 고온 경화에 의한 열기계적 파손 문제를 수반한다. 따라서 유연 접합을 위해서 접합부 두께를 최소화하고 열 손상을 방지하기 위한 저온 접합 공정 개발이 요구된다. 본 연구에서는 플렉서블 기판의 유 연, 강건, 저 열 손상 접합이 가능한 플렉서블 레이저 투과 용접(flexible laser transmission welding, f-LTW)를 개발하였 다. 유연 기판 위 탄소나노튜브(carbon nanotube, CNT)를 박막 코팅하여 접합부 두께를 줄였으며, CNT 분산 빔 레이저 가열을 통한 고분자 기판 표면의 국부적 용융 접합 공정이 개발되었다. 짧은 접합 공정 시간과 기판의 열 손상을 최소화 하는 레이저 공정 조건을 구축하였으며 고분자 기판과 CNT 접합 형성 메커니즘을 분석하였다. 또한 접합부의 강건성 및 유연성 평가를 위해 인장강도 시험, 박리 시험과 반복 굽힘 시험을 진행하였다.
In order to improve the mechanical reliability of next-generation electronic devices including flexible, wearable devices, a high level of mechanical reliability is required at various flexible joints. Organic adhesive materials such as epoxy for bonding existing polymer substrates inevitably have an increase in the thickness of the joint and involve problems of thermodynamic damage due to repeated deformation and high temperature hardening. Therefore, it is required to develop a low-temperature bonding process to minimize the thickness of the joint and prevent thermal damage for flexible bonding. This study developed flexible laser transmission welding (f-LTW) that allows bonding of flexible substrates with flexibility, robustness, and low thermal damage. Carbon nanotube (CNT) is thin-film coated on a flexible substrate to reduce the thickness of the joint, and a local melt bonding process on the surface of a polymer substrate by heating a CNT dispersion beam laser has been developed. The laser process conditions were constructed to minimize the thermal damage of the substrate and the mechanism of forming a CNT junction with the polymer substrate. In addition, lap shear adhesion test, peel test, and repeated bending experiment were conducted to evaluate the strength and flexibility of the flexible bonding joint.
laser transmission welding, flexible substrate, carbon nanotube, mechanical properties
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 129-130.
School of Advanced Materials Engineering, Jeonbuk National University, 567 Baekje-daero, Deokjin-gu, Jeonju 54896, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 1-12.
인공지능 기술의 급속한 발전으로 기존 센서에 인간의 지능과 유사한 기능을 부여하기 위한 연구가 큰 주목을 받고 있다. 기존에는 주로 센서로써의 기초 성능지표, 예를 들어 감도 및 속도 등을 향상시키기 위한 연구가 주로 진행되 었지만, 최근에는 분류나 예측 등의 인공지능을 센서에 결합하기 위한 시도가 확대되고 있다. 이를 바탕으로 최근 질병 감지 센서, 모션 감지 센서 및 가스 센서 등 거의 센서 전 분야에서 지능형 센서에 대한 연구 결과가 활발히 보고되고 있 다. 본 논문에서는 인공지능의 기본적인 개념, 종류 및 메커니즘과 더불어, 최근 보고된 지능형 센서에의 적용 사례에 대 해 알아보고자 한다.
With the rapid development of artificial intelligence technology that gives existing sensors functions similar to human intelligence is drawing attention. Previously, researches were mainly focused on an improvement of fundamental performance indicators as sensors. However, recently, attempts to combine artificial intelligence such as classification and prediction with sensors have been explored. Based on this, intelligent sensor research has been actively reported in almost all kinds of sensing fields such as disease detection, motion detection, and gas sensor. In this paper, we introduce the basic concepts, types, and driving mechanisms of artificial intelligence and review some examples of its use.
Artificial intelligence; Sensor; Machine learning; Deep learning; Intelligent sensor
1Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea, 2Electronic Package Research Center, Kangnam University, 20 Gangnamseo-ro, Giheung-gu, Yongin-si, Gyeonggi-do 16977, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 25-29.
최근 전자 패키징 기술의 중요성이 대두되며, 칩들을 평면 외 방향으로 쌓는 이종 집적 기술이 패키징 분야에 적용되고 있다. 이 중 2.5D 집적 기술은 실리콘 관통 전극를 포함한 인터포저를 이용하여 칩들을 적층하는 기술로, 이미 널리 사용되고 있다. 따라서 다양한 열공정을 거치고 기계적 하중을 받는 패키징 공정에서 이 인터포저의 기계적 신뢰성 을 확보하는 것이 필요하다. 특히 여러 박막들이 증착되는 인터포저의 구조적 특징을 고려할 때, 소재들의 열팽창계수 차 이에 기인하는 열응력은 신뢰성에 큰 영향을 끼칠 수 있다. 이에 본 논문에서는 실리콘 인터포저 위 와이어 본딩을 위한 금속 패드의 열응력에 대한 기계적 신뢰성을 평가하였다. 인터포저를 리플로우 온도로 가열 후 냉각 시 발생하는 금속 패 드의 박리 현상을 관측하고, 그 메커니즘을 규명하였다. 또한 높은 냉각 속도와 시편 취급 중 발생하는 결함들이 박리 양 상을 촉진시킴을 확인하였다.
Recently, the importance of electronic packaging technology has been attracting attention, and heterogeneous integration technology in which chips are stacked out-of-plane direction is being applied to the electronic packaging field. The 2.5D integration circuit is a technology for stacking chips using an interposer including TSV, and is widely used already. Therefore, it is necessary to make the interposer mechanically reliable in the packaging process that undergoes various thermal processes and mechanical loadings. Considering the structural characteristics of the interposer on which several thin films are deposited, thermal stress due to the difference in thermal expansion coefficients of materials can have a great effect on reliability. In this study, the mechanical reliability of the metal pad for wire bonding on the silicon interposer against thermal stress was evaluated. After heating the interposer to the solder reflow temperature, the delamination of the metal pad that occurred during cooling was observed and the mechanism was investigated. In addition, it was confirmed that the high cooling rate and the defect caused by handling promote delamination of the metal pads.
Heterogeneous integration, silicon interposer, spalling, thermal stress, delamination
1Department of Mechanical Convergence Engineering, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea, 2Institute of Nanoscience and Technology, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 31-35.
최근 4차산업혁명으로 대용량 데이터 처리를 위한 고집적 반도체에 대한 수요가 증가하고 있다. 반도체 제품에 장착되는 소자들의 크기가 작아 짐에 따라 표면실장기술(SMT)의 신뢰성에 대한 연구가 관심을 받고 있다. 본 연구에서는 PCB의 패드 디자인이 수동소자의 조립 및 접합 신뢰성에 미치는 영향을 실험 계획법(design of experiment, DOE) 이용하 여 분석하였다. 수동소자를 실장하기 위한 PCB의 패드 길이, 너비 및 두 패드간 거리를 변수로 하여 실험계획법을 수립하 였다. 저항칩의 오배치(misplacement) 방향에 따른 수동소자의 톰스톤(tombstone)불량률을 도출하였다. 전단테스트를 통 해 수동소자와 PCB 사이의 전단력을 측정하였다. 또한, 단면분석을 통해 패드 디자인에 따른 솔더의 형상을 분석하였다.
Recently, with the 4th industrial revolution, the demand for high-density semiconductors for large-capacity data processing is increasing. Researchers are interested in researching the reliability of surface mount technology (SMT). In this study, the effect of PCB pad design on assembly and adhesion reliability of passive component was analyzed using design of experiment (DOE). The DOE method was established using the pad length, width, and distance between pads of the PCB as variables. The assembly defect rate of the passive element after the reflow process was derived according to the misplacement direction of the chip resistor. The shear force between the passive element and the PCB was measured using shear tests. In addition, the shape of the solder according to the pad design was analyzed through cross-sectional analysis.
Surface mount technology, pad design, passive chip, SAC305, reliability
1Department of Mechanical Convergence Engineering, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea, 2Institute of Nanoscience and Technology, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 37-42.
최근 반도체 패키지 구조는 점점 더 얇아지고 복잡해지고 있다. 두께가 얇아짐에 이종 계면에서 물성차이에 의 한 박리는 심화될 수 있으며 따라서 계면의 신뢰성이 패키징 설계에 중요한 요소라 할 수 있다. 특히, 반도체 패키징에 많 이 사용되는 폴리머는 온도와 수분에 영향을 크게 받기 때문에 환경에 따른 물성 변화 고려가 필수적이다. 따라서, 본 연 구에서는 다양한 온도조건에서 수분의 흡습과 탈습을 모두 고려한 패키지 구조의 계면 박리 예측을 유한 요소 해석을 통 해 수행하였다. 확산계수와 포화 수분 함량과 같은 재료의 물성은 흡습 실험을 통해 확보하였으며, 흡습 이후 TMA 와 TGA 를 통하여 각 재료의 수분 팽창 계수를 확보하였다. 각 계면의 접합 강도 평가를 위해 수분의 영향을 고려하여 다 양한 온도 조건에서 마이크로 전단 실험을 수행하였다. 이러한 물성을 바탕으로 온도와 수분에 의해 발생하는 변형을 모 두 고려한 패키지 박리 예측 해석을 수행하였으며, 결과적으로 리플로우 공정 동안의 실시간 수분 탈습 거동을 고려한 계 면 박리 예측을 성공적으로 수행하였다.
Recently, the semiconductor package structures are becoming thinner and more complex. As the thickness decrease, interfacial delamination due to material mismatch can be further maximized, so the reliability of interface is a critical issue in industry field. Especially, the polymers, which are widely used in semiconductor packaging, are significantly affected by the temperature and moisture. Therefore, in this study, the delamination prediction at the interface of package structure was performed through finite element analysis considering the moisture absorption and desorption under the various temperature conditions. The material properties such as diffusivity and saturated moisture content were obtained from moisture absorption test. The hygro-swelling coefficients of each material were analyzed through TMA and TGA after the moisture absorption. The micro-shear test was conducted to evaluate the adhesion strength of each interface at various temperatures considering the moisture effect. The finite element analysis of interfacial delamination was performed that considers both deformation due to temperature and moisture absorption. Consequently, the interfacial delamination was successfully predicted in consideration of the in-situ moisture desorption and temperature behavior during the reflow process.
Semiconductor package, hygroscopic thermal behavior, interfacial delamination, adhesion reliability
1Department of Mechanical Convergence Engineering, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea, 2Institute of Nanoscience and Technology, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 43-48.
본 연구에서는 재료의 이방성 점탄성 거동을 고려한 해석 기법을 개발하여 휨(Warpage) 해석의 정합성을 개 선하고자 하였다. 먼저, 이방성 점탄성 거동 구현을 위해 구리 패턴(Cu trace) 및 범프(Bump)가 존재하는 패키지를 모델 링 하였다. 복잡한 형상의 범프 영역은 대표체적요소 모델을 기반으로 등가 이방성 점탄성 물성 및 열 팽창계수를 도출 하였다. 도출된 물성을 기반으로 패키지에 0~125도의 열 주기(Thermal cycle)를 가하였으며, 열 주기에 따른 패키지의 휨 경향을 확인하였다. 해석 결과의 검증을 위해 해석 모델과 동일한 패키지를 제작하였고, 쉐도우 모아레 간섭계(Shadow Moire interferometer)를 통해 열 주기에 따른 실제 패키지의 휨 정도를 측정하였다. 결과적으로 구리 패턴, 범프 등의 요 소가 고려된 등가 이방성 점탄성 해석 기법의 적용으로 5 μm 이내의 오차로 패키지의 휨 정도를 계산하고 휨의 형태를 예측할 수 있었다.
In this study, simulation method was developed to improve the accuracy of the warpage simulation based on the equivalent anisotropic viscoelastic model. First, a package with copper traces and bumps was modeled to implement anisotropic viscoelastic behavior. Then, equivalent anisotropic viscoelastic properties and thermal expansion coefficient for the bump region were derived through the representative volume element model. A thermal cycle of 0 to 125 degrees was applied to the package based on the derived mechanical properties, and the warpage according to the thermal cycle was simulated. To verify the simulation results, the actual package was manufactured, and the warpage with respect to the thermal cycle was measured through shadow moiré interferometer. As a result, by applying the equivalent anisotropic viscoelastic model, it was possible to calculate the warpage of the package within 5 μm error and predict the shape of the warpage.
Package, Warpage, Anisotropic viscoelastic property, Representative volume element model, Finite element method
1Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Korea, 2SK Innovation Co. Ltd.
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 49-53.
초박형 유리(Ultra-Thin Glass, UTG)는 디스플레이 보호용 커버 윈도우로 폴더블(foldable) 디스플레이에 사용 되고 있으며, 향후에는 롤러블(rollable) 디스플레이나 다양한 플렉시블(flexible) 전자기기에 확대 적용될 것으로 예상되고 있다. 폴더블 디스플레이의 경우, 사용자들에 의해 굽힘과 터치 펜에 의해 충격을 받게 되고, 이 외에도 낙하 등 다른 외부 충격에 쉽게 노출되어 있다. 초박형 유리는 100 μm 이하로 두께가 얇고 취성하여 여러 외부 충격에 의해 쉽게 균열이나 파단이 발생할 수 있고, 이러한 균열이나 파단은 폴더블 디스플레이에 심각한 신뢰성 문제를 야기한다. 따라서, 본 연구에 서는 초박형 유리의 내충격 신뢰성을 평가하는 펜 낙하 실험을 유한 요소 모델로 구성하고, 초박형 유리의 내충격 신뢰성 을 향상시키기 위한 기계적 모델링을 진행하였다. 초박형 유리층 상부 혹은 하부에 보강층을 삽입했을 때, 펜 낙하에 의해 초박형 유리층에 작용하는 응력 메커니즘을 분석하였고, 그에 따라 신뢰성 향상을 위한 최적의 구조를 제시하였다. 또한 초박형 유리의 강도에 따른 최대 펜 낙하 높이를 예측할 수 있도록 펜 낙하 높이에 따라 초박형 유리층에 작용하는 최대 주 응력 값을 분석하였다.
Ultra-thin glass (UTG) has been widely used in foldable display as a cover window for the protection of display and has a great potential for rollable display and various flexible electronics. The foldable display is under impact loading by bending and touch pen and exposed to other external impact loads such as drop while people are using it. These external impact loads can cause cracks or fracture to UTG because it is very thin under 100 μm as well as brittle. Cracking and fracture lead to severe reliability problems for foldable smartphone. Thus, this study constructs finite element analysis (FEA) model for the pen drop test which can measure the impact resistance of UTG and conducts mechanical modeling to improve the reliability of UTG under impact loading. When a protective layer is placed to an upper layer or lower layer of UTG layer, stress mechanism which is applied to the UTG layer by pen drop is analyzed and an optimized structure is suggested for reliability improvement of UTG layer. Furthermore, maximum principal stress values applied at the UTG layer are analyzed according to pen drop height to obtain maximum pen drop height based on the strength of UTG.
Ultra-Thin Glass (UTG), Finite Element Analysis Modeling, Pen Drop Test, Protective Layer
1Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology(KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea, 2School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea, 3Industrial Materials and Smart Manufacturing Engineering, University of Science and Technology(UST), Gajeong-ro, Yuseong-gu, Dajeon 34113, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 55-61.
본 연구에서는 용융온도가 중온계 무연 솔더인 Sn-3.0Ag-0.5Cu(SAC305)와 저온계 무연 솔더인 Sn-57Bi-1Ag 를 사용하여 형성된 복합 무연 솔더 접합부의 특성에 대하여 보고 하였다. SAC305 솔더볼이 형성된 ball grid array(BGA) 패키지와 Sn-57Bi-1Ag 솔더 페이스트가 도포된 flame retardant-4(FR-4) 인쇄회로기판(printed circuit board, PCB)을 리 플로우 솔더링 공정을 이용하여 복합 무연 솔더 접합부를 형성 하였다. 공정 온도 프로파일을 두 가지 형태로 달리하여 리플로우 솔더링 공정을 진행하였으며 리플로우 솔더링 공정 조건에 따른 계면 반응, 금속간화합물(intermetallic compound, IMC)의 형성, Bi의 확산 거동 등 복합 무연 솔더 접합부 계면 특성을 비교 분석 하였다. 또한, 열 충격 시험 을 통하여 리플로우 솔더링 공정에 따른 복합 무연 솔더 접합부의 신뢰성 특성을 비교하고 열 충격 시험 전후 전단 시험 을 진행하여 접합부의 기계적 특성 변화를 분석하였다.
In this study, properties of Pb-free solder joints which were combined using Sn-3.0Ag-0.5Cu (SAC305) Pbfree solder with a mid-temperature type of melting temperature and Sn-57Bi-1Ag Pb-free solder with a low-temperature type of melting temperature were reported. Combined Pb-free solder joints were formed by reflow soldering processes with ball grid array (BGA) packages which have SAC305 solder balls and flame retardant-4 (FR-4) printed circuit boards (PCBs) which printed Sn-57Bi-1Ag solder paste. The reflow soldering processes were performed with two types of temperature profiles and interfacial properties of combined Pb-free solder joints such as interfacial reactions, formations of intermetallic compounds (IMCs), diffusion mechanisms of Bi, and so on were analyzed with the reflow process conditions. In order to compare reliability characteristics of combined Pb-free solder joints, we also conducted thermal shock test and analyzed changes of mechanical properties for joints from a shear test during the thermal shock test.
SAC305, Sn-57Bi-1Ag, reflow soldering, combined Pb-free solder joint, interfacial reaction, intermetallic compound, reliability
1Advanced Joining & Additive Manufacturing R&D Department, Korea Institute of Industrial Technology, 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea, 2MK Chem & Tech Co., Ltd, Ansan 15434, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 63-71.
본 연구에서는 Sn-Ag-Cu (SAC)솔더와 electroless nickel autocatalytic gold (ENAG) 표면처리 간 계면반응 및 낙하충격 신뢰성을 연구하였다. ENAG 솔더 접합부의 특성은 다른 Ni계 표면처리인 electroless nickel immersion gold (ENIG)와 electroless nickel electroless palladium immersion gold (ENEPIG)와 비교 평가 하였다. SAC솔더와 Ni계 표면 처리 계면에서는 (Cu, Ni)6Sn5 intermetallic compound (IMC)가 형성되었다. IMC 두께는 SAC/ENAG와 SAC/ENEPIG 는 1.15 ㎛, 1.12 ㎛로 비슷하였고, SAC/ENIG는 IMC 두께가 2.99 ㎛로 SAC/ENAG보다 2배 정도 높았다. 또한 솔더 접합부의 IMC두께는 무전해 Ni(P) 도금액의 metal turnover (MTO)조건에 영향을 받는 다는 것을 알 수 있었고, MTO가 0에서 3으로 증가하면 IMC두께가 증가함을 알 수 있었다. 전단강도는 SAC/ENEPIG의 접합강도가 가장 높았고, SAC/ ENAG, SAC/ENIG 순이었다. 또한, MTO가 증가하면, 전단강도가 낮아짐을 알 수 있었다. 취성파괴도 SAC/ENEPIG가 세가지 접합부 중 가장 낮았으며, SAC/ENAG, SAC/ENIG 순이였고, 마찬가지로 MTO가 증가하면 취성파괴가 높아짐을 알 수 있었다. 낙하충격 시험에서도 0 MTO조건이 3 MTO조건보다 높은 평균파괴횟수를 갖는 것을 확인하였고, 평균파 괴횟수도 SAC/ENEPIG, SAC/ENAG, SAC/ENIG순으로 높았다. 낙하 충격 후 파단면을 관찰한 결과 크랙은 IMC와 Ni(P) 층 사이에서 진행되었다.
In this study, the interfacial reaction and drop impact reliability of Sn-Ag-Cu (SAC) solder and electroless nickel autocatalytic gold (ENAG) were studied. In addition, the solder joint properties with the ENAG surface finish was compared with electroless nickel immersion gold (ENIG) and electroless nickel electroless palladium immersion gold (ENEPIG). The IMC thickness of SAC/ENAG and SAC/ENEPIG were 1.15 and 1.12 ㎛, respectively, which were similar each other. The IMC thickness of the SAC/ENIG was 2.99 ㎛, which was about two times higher than that of SAC/ ENAG. Moreover, it was found that the IMC thickness of the solder joint was affected by the metal turnover (MTO) condition of the electroless Ni(P) plating solution, and it was found that the IMC thickness increased when the MTO increased from 0 to 3. The shear strength of SAC/ENEPIG was the highest, followed by SAC/ENAG and SAC/ENIG. It was found that when the MTO increased, the shear strength was lowered. In terms of brittle fracture, SAC/ENEPIG was the lowest among the three joints, followed by SAC/ENAG and SAC/ENIG. Likewise, it was found that as MTO increased, brittle fracture increased. In the drop impact test, it was confirmed that the 0 MTO condition had a higher average number of failures than the 3 MTO condition, and the average number of failures was also higher in the order of SAC/ENEIG, SAC/ENAG, and SAC/ENIG. As a result of observing the fracture surface after the drop impact, it was found that the fracture was between the IMC and the Ni(P) layer.
Sn-Ag-Cu solder; ENAG; ENIG; ENEPIG; Surface finish; intermetallic compound; shear strength; drop test
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 73-73.
Dept. of Materials Science and Engineering, University of Seoul
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 1-8.
TSV 기술을 포함한 고밀도, 고집적 패키징 기술은 IoT, 6G/5G 통신, HPC (high-performance computing) 등 여러 분야에서 중요한 기술로 여겨지고 있다. 2차원에서 고집적화를 달성하는 것은 물리적 한계에 도달하게 되었으며, 따라서 3D 패키징 기술을 위하여 다양한 연구들이 진행되고 있다. 본 고에서 scallop의 형성 원인과 영향, 매끈한 측벽을 만들기 위한 scallop-free 에칭 기술, TSV 표면의 Cu bonding에 대해서 자세히 조사하였다. 이러한 기술들은 고품질 TSV 형성 및 3D 패키징 기술에 영향을 줄 것으로 예상한다.
High-density packaging technologies, including Through-Si-Via (TSV) technologies, are considered important in many fields such as IoT (internet of things), 6G/5G (generation) communication, and high-performance computing (HPC). Achieving high integration in two dimensional packaging has confronted with physical limitations, and hence various studies have been performed for the three-dimensional (3D) packaging technologies. In this review, we described about the causes and effects of scallop formation in TSV, the scallop-free etching technique for creating smooth sidewalls, Cu pillar and Cu-SiO2 hybrid bonding in TSV. These technologies are expected to have effects on the formation of highquality TSVs and the development of 3D packaging technologies.
Three dimensional packaging, Through-Si-Via (TSV), Scallop-free, Cu bonding
1Department of Materials Science and Engineering, Kangwon National University, 1, Kangwondaehak-gil, Chuncheon-si, Gangwon-do, 24341, South Korea, 2Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea, 3Department of Advanced Materials Engineering for Information and Electronics, Kyung Hee University, Yongin, Gyeonggi-do 17104, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 9-14.
실리카 에어로겔은 매우 낮은 밀도, 고비표면적을 갖는 다공성 물질로 구조적 특성으로 인한 취약한 기계적 특성 때문에 응용이 제한되어 이를 해결하기 위한 폴리머와의 다양한 복합화 기술이 제안되어 왔다. 본 연구에서는 에어로겔의 기계적 강도를 향상시키고자 폴리이미드가 가교된 실리카 에어로겔을 합성하였다. 실리카 에어로겔을 만들기 위한 전구체로 tetraethyl orthosilicate(TEOS)가 사용되었고, 3-Aminopropyltriethoxysilane(APTES)은 폴리이미드와 가교 결합을 하기 위한 coupling agent로 사용되었다. 폴리이미드는 pyromellitic dianhydride, 3, 5-diaminobenzoic acid를 사용해 합성되었고 의 반응식을 사용해 폴리이미드 체인의 반복 단위 수가 10인 폴리이미드를 가교 결합하여 기계적 물성이 향상된 실리카 에어로겔을 구현하였다. 겔화 전에 다양한 중량비를 갖는 폴리이미드를 첨가하여 최대 압축 강도가 실리카 에어로겔 대비 19배 이상 증가가 관찰되어 폴리머 가교결합을 통한 실리카 에어로겔의 기계적 강도가 크게 개선될 수 있음을 확인하였다.
Silica aerogel is a porous material with a very low density and high specific surface area. Still, its application is limited due to its weak mechanical properties due to structural features. To solve this problem, a method of complexing it with various polymers has been proposed. We synthesized polyimide cross-linked silica aerogel by the sol-gel process to obtain high mechanical properties. Tetraethyl orthosilicate (TEOS) was used as a precursor to make silica aerogel, and 3- aminopropyltriethoxysilane (APTES) was used as a coupling agent for cross-linking polyimide. Polyimide was synthesized using pyromellitic dianhydride and 3,5-diaminobenzoic acid, and mechanical properties were improved by crosslinking polyimide with 10 repeating units in the polyimide chain using the reaction formula To realize silica aerogel, polyimide having various weight ratios was added before gelation, resulting in a 19-fold or greater increase in maximum compressive strength compared to pure silica aerogel. From this study, an enhancement of silica aerogel could be enhanced through polymer cross-linking bonds.
Polyimide, Silica, Aerogel, Cross-linking, Mechanical properties
1Department of Materials Science and Engineering, Kangwon National University, 1, Kangwondaehak-gil, Chuncheon-si, Gangwon-do, 24341, South Korea, 2Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea, 3Department of Advanced Materials Engineering for Information and Electronics, Kyung Hee University, Yongin, Gyeonggi-do 17104, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 15-20.
에어로겔은 높은 기공률과 나노기공구조를 갖는 물질이다. 이러한 높은 기공률로 인해 기존의 소재에서 볼 수 없는 뛰어난 특성을 보유하고 있지만 낮은 기계적 강도로 인해 적용이 제한되어왔다. 따라서 이러한 에어로겔의 기계적 강도의 향상을 위해 본 연구에서는 폴리우레아 가교결합을 도입하고 폴리우레아 고분자 형성에 필수적인 아민기를 갖는 전구체를 선택하여 폴리우레아가 가교결합된 에어로겔 복합체를 합성하였다. 또한, aminosilane에 존재하는 아민기의 수에 따라 폴리우레아의 가교결합을 조절하였고 다양한 분석을 통해 에어로겔이 나노기공구조를 유지하며 mesopore를 갖는다는 것을 확인하였다. 이렇게 형성된 에어로겔은 약 2배의 기계적 강도 향상을 나타내었고 Ethylene diamine의 도입을 통해 실리카 에어로겔 표면에 1차원의 고분자가 성장하는 것을 field emission scanning electron microscope 분석을 통해 확인하였다. 이렇게 형성된 1차원의 고분자는 기계적 특성을 향상시켜 약 2.66 MPa의 elastic modulus를 확보하는 결과를 도출하였다.
Aerogel is a material having a nanopore structure based on a high porosity. Due to this high porosity, it has excellent properties not found in conventional materials, but its application has been limited due to low mechanical strength. Therefore, to improve the mechanical strength of the aerogel, polyurea crosslinking was introduced and a precursor having an amine group essential for polyurea polymer formation was selected to synthesize a polyurea crosslinked aerogel composite. In addition, the crosslinking of polyurea was adjusted according to the number of amine groups present in aminosilane. It was confirmed through various analyses that the nanopore structure of the aerogel was maintained to have mesopores. The aerogel thus formed was able to improve the mechanical strength by about two times, and it was confirmed through field emission scanning electron microscope analysis that a one-dimensional polymer was formed on the silica aerogel surface through the introduction of ethylene diamine. The one-dimensional polymer thus formed has improved mechanical properties, resulting in securing an elastic modulus of about 2.66 MPa.
Silica aerogel, Aminosilane, Cross-linking, Polyurea, Isocyanate, Ethylene diamine
1ICT device packaging Research Center, Korea Electronics Technology Institute (KETI), Bundang-gu, Seongnam-si, Gyeonggi-do 13509, Korea, 2Department of Fine Chemistry, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul 01811, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 21-27.
저렴한 전도성 흑연을 인쇄전자 공법으로 유연 압력 센서를 개발하였다. 유연 압력 센서는 의료, 게임, AI 등 미래 산업에 활용될 소재로 각광받고 있다. 유연 압력 센서용 인쇄전극을 다양한 전기-기계적 특성을 평가한 결과 최대인장률 20%, 30°의 인장/굽힘, 간이 맥박 시험에서 일정한 저항 변화율을 보였다. 이렇게 검증이 완료된 전극을 시뮬레이션하여 더 적합한 matrix 패턴을 설계하였다. Serpentine 패턴을 활용하여 matrix 패턴 제작과 인캡슐레이션을 동시에 진행할 수 있는 공정을 활용하였다. 인쇄된 흑연 전극의 한쪽 면에 접착력 증가를 위한 O2 플라즈마 표면처리하고, 90°회전시켜, 라미네이션 공정을 통해 2개의 전극을 하나로 제작하였다. 이렇게 제작된 matrix 패턴을 인체의 손목 맥박 위치에 부착하여 실측을 진행한 결과 남녀 상관없이 일정한 저항 변화율을 보였다.
Flexible pressure sensor was developed using low-cost conductive graphite as printed electronics. Flexible pressure sensors are attracting attention as materials to be used in future industries such as medical, games, and AI. As a result of evaluating various electromechanical properties of the printed electrode for flexible pressure sensors, it showed a constant resistance change rate in a maximum tensile rate of 20%, 30° tension/bending, and a simple pulse test. A more appropriate matrix pattern was designed by simulating the electrodes for which this verification was completed. Utilizing the Serpentine pattern, we utilized a process that allows simultaneous fabrication and encapsulation of the matrix pattern. One side of the printed graphite electrode was O2 plasma surface treated to increase adhesive strength, rotated 90 times, and two electrodes were made into one through a lamination process. As a result of pasting the matrix pattern prepared in this way to the wrist pulse position of the human body and proceeding with the actual measurement, a constant rate of resistance change was shown regardless of gender.
Flexible pressure sensors, Low-cost graphite paste, Printed electronics, O2 plasma treatment
Smart Electronics Research Center, Korea Electronics Technology Institute 111, Ballyong-ro, Deokjin-gu, Jeonju-si, Jeollabuk-do 54853, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 29-34.
위상지연 필름을 이용하여 가시광선 투과도 제어가 가능한 스마트윈도우 제작 기술을 제안한다. 위상지연 필름의 phase retardation(Γ)이 π/2(Δn·d = λ/4)인 경우 선편광을 원편광으로 변환시켜줄 수 있으며, 서로 다른 배향각도를 갖는 두 장의 λ/4 위상지연 필름을 이용하여 광투과 모드(45°/-45°)와 광차단 모드(45°/45°) 제어가 가능한 스마트윈도우를 제작할 수 있다. 본 연구에서는 복굴절 물질인 reactive mesogen (RM)의 두께에 따른 retardation 특성(Δn·d)을 평가함으로써 Δn·d가 λ/4인 위상지연 필름을 제작하였다. 서로 다른 Δn·d 값을 갖는 위상지연 필름이 적용된 스마트윈도우의 광차단 특성을 평가한 결과, λ/4 위상지연 필름 기반의 스마트윈도우에서 가장 높은 광차단율(≥20%)을 보였다. 이를 통해 Δn·d의 값이 λ/4 일 때 위상지연 효과가 가장 높다는 것을 확인하였으며, λ/4 위상지연 필름을 적용하여 150×150 mm2 크기의 스마트윈도우를 구현하였다.
A fabrication process of smart windows with controllable visible light transmittance by using retardation films is proposed. The λ/4-phase retardation films that can convert a linearly polarized light into circularly polarized light are achieved through photo-alignment layers and reactive mesogen (RM) coating process. Two sheets of the fabricated retardation films with different orientation angles induced to light transmission mode (45°/-45°) and light blocking mode (45°/45°) for visible wavelength. We evaluated retardation characteristics according to the thickness of the birefringent RM material and found out the optimal condition for the film with Δn·d of λ/4-phase. The proposed structure of the smart window exhibited the light blocking ratio improved by more than 20% in the visible wavelength (380 nm to 780 nm). Finally, it was confirmed that the feasibility of the window structure by applying to a prototype for a smart window with a size of 150 × 150 mm2.
Smart window, Reactive Mesogen, Retarder, Phase retardation, circular polarization
Department of Nanotechnology Engineering, Pukyong National University
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 35-40.
본 연구에서는 실버 파우더의 입자 크기, 즉 평균입자 크기가 2μm, 7μm, 이들의 혼합(50:50wt%), 이렇게 3가지 실버 페이스트를 제조하여 점도 및 점탄성, 경화후에 잔류용제 유무 확인을 위한 TGA측정, Strain에 따른 저항변화 및 전극 표면구조 변화에 대해서 검토한 결과 다음과 같은 결론을 얻을 수 있었다. 이러한 결과를 정리하면 Strain에 따른 저항변화를 최소화하기 위해서는 실버 파우더의 입자를 2μm정도인 것이 가장 바람직함을 알 수 있었다.
In this study, the average particle size of silver powder was 2μm, 7μm, and a mixture of these (50:50wt%), three kinds of silver pastes were prepared. In addition, as a result of examining the viscosity and viscoelasticity of the three silver pastes, TGA measurement, resistance change according to strain, and change in surface structure of the electrode, the following conclusions were obtained. Summarizing these results, it was found that it is most desirable to have a particle size of about 2μm in order to minimize the change in resistance due to strain.
Silver powder size, Silver paste, Screen printing. Conductivity, Stretchable properties
Department of Advanced Materials Engineering, Kyonggi University, Suwon 16227, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 49-53.
본 연구는 최적화된 전기발광 성능을 가진 양자점 전계 발광 다이오드 소자를 제작하기 위해 RF sputtering 기법으로 Zn0.85Mg0.15O 박막을 전자수송층으로 적용하였다. 일반적으로 양자점 전계 발광 다이오드에서 ZnO 나노입자는 적절한 에너지 준위를 가지고 있어 전자 이동도가 빠르고 용액 처리가 용이하다는 장점으로 전자 수송층으로 널리 사용되는 재료이다. 그러나, 용액형 ZnO 나노입자의 불안정성 문제는 아직 해결되지 않고 있다. 이를 해결하기 위해 본 연구에서는 ZnO에 15 % Mg을 도핑한 ZnMgO 박막을 RF sputtering법으로 제작하고 전자수송층으로 적용한 소자를 최적화하였다. 최적화된 ZnMgO 박막을 이용한 소자는 최대 휘도 15,972 cd/m2, 전류효율 7.9 cd/A를 보였다. Sputtering ZnMgO 박막 기반 양자점 전계 발광 다이오드 소자는 용액형 ZnO 나노입자의 문제를 해결하고 미래 디스플레이 소자 제작 기술의 적용 가능성을 확인하였다.
In this study, quantum dot light–emitting diodes (QLEDs) of the optimized EL performance with a radio frequency (RF) sputtered Zn0.85Mg0.15O thin film as an electron transport layer (ETL). In typical QLEDs, ZnO nanoparticles (NPs) are widely used materials for ETL layer due to their advantages of high electron mobility, suitable energy level and easy capable of solution processing. However, the instability problem of solution-type ZnO NPs has not yet been resolved. To solve this problem, ZnMgO thin film doped with 15% Mg of ZnO was fabricated by RF sputtering and optimized for the device applied as an ETL. The QLEDs of optimized ZnMgO thin film exhibited a maximum luminance of 15,972 cd/m2 and a current efficiency of 7.9 cd/A. Efficient QLEDs using sputtering ZnMgO thin film show the promising results for the future display technology.
QLEDs, ZnMgO, ETL, RF sputtering
1Department of Opto-Mechatronics Engineering, Pusan National University, Geumjeong-gu, Busan 46241, Korea, 2Department of Cogno-Mechatronics Engineering, Pusan National University, Geumjeong-gu, Busan 46241, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 55-61.
다중 암의 동시 진단 기술에 대한 관심이 전 세계적으로 증가하는 추세이며, 진단 난이도를 낮추기 위해 혈액과 같은 미량의 바이오 유체를 이용하여 질병을 진단하는 미세 유체 소자 기반의 액체 생검 기술이 연구되고 있다. 바이오 유체를 이용하여 형광 영상 등을 통해 분석물질의 농도를 측정하는 광학적 바이오 센싱에 있어 민감도를 향상시키기 위한 기술개발이 필요하다. 본 논문에서는 모세관력에 의한 자가구동 기반의 마이크로 채널의 기하학적 구조와 미세 유체 현상만으로 수동적 자기 혈장 분리 기술과 유체 혼합을 통한 분자 인식 활성화 기능을 구현하는 형광 다중 암 진단 센서 플랫폼 구조를 제안하고 설계하였다. 설계된 센서의 혈장 분리부의 성능에 영향을 미치는 파라미터를 확인하기 위해 채널의 수력학적 직경과 종횡비, 유체의 점도를 변수로 설정하여 딘 와류 형성 여부를 시뮬레이션을 통해 확인하였고 최적의 센서 플랫폼 구조를 제시하였다.
There is a major interest in diagnostic technology for multiple cancers worldwide. In order to reduce the difficulty of cancer diagnosis, a liquid biopsy technology based on a microfluidic device using trace amounts of biofluids such as blood is being studied. And optical biosensing, which measures the concentration of analytes through fluorescence imaging using biofluids, requires various strategies to improve sensitivity, and specialists and equipment are needed to carry out these strategies. This leads to an increase in diagnostic and production costs, and it is necessary to develop a technology to solve this problem. In this paper, we design and propose a fluorescent multi-cancer diagnostic sensing platform structure that implements passive self-separation technology and molecular recognition activation functions by fluid mixing, only with the geometry and microfluidic phenomena of microchannels based on self-driven flow by capillary force. In order to check the parameters affecting the performance of the plasma separation part of the designed sensor, the hydrodynamic diameter of the channel and the viscosity of the fluid were set as variables to confirm the formation of plasma separation flow through simulation. And finally, we propose an optimal sensor platform structure.
passive self-separation, microfluidics, dean vortex, fluid mixing, fluorescence sensor
1Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea, 2Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 63-69.
이산화 바나듐은 금속-절연체 전이라는 독특한 특성으로 인해 기초적인 소재 연구 및 산업에의 응용을 위한 연구가 꾸준하게 진행되고 있다. 본 연구에서는 통전활성소결법으로 제조한 이산화 바나듐의 금속-절연체 전이 특성에 마그네슘과 텅스텐 첨가가 미치는 영향을 연구하였으며, 덩어리 시편을 대상으로 그 거동을 고찰하였다. 상용 분말과 통전활성소결법을 이용하여 열처리를 진행하여 제작한 시편의 경우 격자 상수의 변화는 크지 않고 이차상이 존재하였으며, 이로 인해 상전이 온도는 64.2-64.6oC에 분포하는 것으로 나타났다. 반면 불순물의 종류와 함량에 따라 전기전도도는 최대 2.4배 증가하거나 최대 57.4배 감소하는 거동을 나타냈다. 열전도도는 불순물의 첨가에 따라 증가하는 거동을 나타냈으며, 상전이 온도 이전에서는 1.8~2.5 W/m·K, 성전이 온도 이후에서는 1.9~2.8 W/m·K의 값을 가졌다. 이러한 물성 변화는 불순물의 첨가로 인한 전하 나르개 농도의 변화, 불순물의 산란중심, 미세구조의 변화 등이 복합적으로 작용한 결과로 해석할 수 있다.
Vanadium dioxide shows a unique and interesting property of metal-insulator transition, which has attracted great attention from the viewpoints of fundamental materials science and industrial applications. In this study, the effect of Mg and W addition on the metal-insulator transition of VO2 were investigated for the bulk materials that are prepared by spark plasma sintering. The X-ray diffraction analysis of the sintered specimens revealed that the lattice parameters barely change, and the secondary phases are present. The transition temperature of MIT appears in the range of 64.2-64.6oC, regardless of the impurity element and content. On the other hand, the addition of Mg and W alters the electrical conductivity, i.e., the electrical conductivity increases by a factor of up to 2.4 or decrease by a factor of up to 57.4 depending on the impurity type and its content. The thermal conductivity showed the values of 1.8~2.5 W/m·K below the transition temperature, and the values of 1.9~2.8 W/m·K above the transition temperature. These changes in electrical and thermal conductivities can be attributed to the combination of the change in charge carrier density, the impurities as scattering centers, and the change in microstructures.
VO2, metal-insulator transition, doping, spark plasma sintering
Department of Materials Science and Engineering, Hongik University, 94 Wausan-ro, Mapogu, Seoul 04066, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 71-75.
본 연구에서는 환원전극 기판이 철-니켈 합금 도금에 미치는 영향을 알아보기 위해 경면 스테인리스강(SS304, SS430)과 티타늄 판을 환원전극으로 사용해 도금을 진행했으며, 티타늄의 경우 3M 황산-메탄올 용액에서 전압과 연마 시간을 조절하여 찾은 최적의 시편(10 V, 8 분)과 표면 처리하지 않은 시편을 사용하였다. 도금층의 조성을 분석한 결과, 스테인리스강과 티타늄 기판에서 니켈보다 환원 경향성이 낮은 철이 먼저 환원되는 비정상 도금 현상이 관찰되었으나 도금층의 앞면과 뒷면의 조성 불균일이 확인되었다. 도금 중 포텐셜 변화를 관찰한 결과, 스테인리스강보다 티타늄을 사용했을 때 도금 셀에 높은 과전압이 걸렸으며, 이로 인해 철의 핵생성 속도가 증가해 과전압이 가장 높았던 표면처리를 하지 않은 티타늄에서 형성된 도금층 뒷면의 철 함량이 높아진 것으로 보인다. 또한 티타늄을 기판을 표면 처리했을 때 셀에 걸린 과전압이 낮아진 것을 확인할 수 있었다.
In this research, Fe-Ni alloy films were electrodeposited on stainless steel (SS304 and SS430) and Ti plates to investigate the effects of surface conditions of cathode on deposits. The Ti plates were electropolished in 3 M H2SO4-methanol electrolytes at various conditions before electrodeposition, and unpolished Ti and the optimized specimen, polished at 10 V for 8 min, were used as cathode. The anomalous codeposition, the phenomenon which more active Fe is reduced preferentially, occurred on all substrate, however, there were differences in composition of all deposits. As the results of potential monitoring during electrodeposition, it was confirmed that the larger overpotential was applied to the deposition cell when using Ti cathode, leading to high Fe content of deposits from unpolished Ti due to increase in nucleation of Fe. Also, it was founded that the polished Ti can reduced deposition overpotential.
Fe-Ni alloy, electrodeposition, Ti electropolishing, anomalous codeposition
Department of Materials Science and Engineering, Hongik University, 94 Wausan-ro, Mapogu, Seoul 04066, Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 77-82.
PCB 기판의 구리 식각 시 전기도금된 배선과 기지층의 전도층은 다른 에칭 특성을 가지며 이로 인한 배선의 과에칭과 배선기저부의 언터컷 현상이 보고되고 있다. 본 연구에서는 구리 에칭의 조성 변화에 따른 구리 에칭 특성에 대하여 연구하였다. 분극법과 OCV (open circuit voltage)를 이용하여 에칭액의 전기도금 구리와 기지층 구리의 최적 과산화수소와 황산의 농도를 얻었다. OCV와 ZRA (zero resistance ammeter)분석법을 이용하여 억제재의 효과를 비교하였다. 구리배선과 기지층간의 갈바닉 전류를 ZRA 방법을 이용하여 측정 비교하였다. 갈바닉 전류를 최소화하는 억제재를 ZRA를 이용한 갈바닉 쌍으로부터 선택할 수 있었다.
During etching process of PCB, the electroplated copper line and seed layer copper have different etching rates and it caused the over etching of copper line as well as undercut of lines. In this research, the effects of etchants composition on copper etching characteristics were investigated. The optimum concentration of hydrogen peroxide and sulfuric acid of etchants were obtained using polarization and OCV (open circuit voltage) analysis for both rolled copper and electroplated copper. The inhibiting effects of different inhibitors were investigated using OCV and ZRA (zero resistance ammeter) analysis. The galvanic current between electroplated copper and seed layer copper were measured using ZRA method. Inhibitors for least galvanic current could be chosen based on galvanic coupling in ZRA analysis.
Copper etching, undercut, inhibitor, galvanic current, ZRA
1Department of Mechanical Convergence Engineering, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea, 2Institute of Nanoscience and Technology, Hanyang University, Wangsimni-ro, Seongdong-gu, Seoul 04763, korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 83-87.
최근 반도체 패키지 두께가 점점 얇아짐에 따라 휨(warpage) 문제가 대두되고 있다. 휨(warpage)은 패키지 구성요소들 간의 물성 차이로 인해 발생하기 때문에, 휨(warpage)을 예측하기 위해서는 주된 구성요소인 EMC(Epoxy molding compound)의 정확한 물성 파악이 필수적으로 요구된다. 특히 EMC는 경화 공정 중 경화 수축을 보이는데, 겔점 이후에 발생하는 유효 경화 수축은 휨(warpage) 발생의 핵심 요소이다. 본 연구에서는 유전 센서를 이용해 측정한 소실 계수로부터 실제 반도체 패키지 경화 공정 동안 발생하는 EMC의 겔점이 정의되었다. 유전 센서로부터 얻은 결과를 분석하기 위해 DSC(Differential scanning calorimetry) 시험과 rheometer 시험이 수행되었다. 그 결과, 유전 측정법이 EMC 경화상태 모니터링에 효과적인 방법임이 검증되었다. 유전 측정과 동시에 광섬유 센서를 이용해 EMC의 경화 공정 중 변형률 변화 추이가 함께 측정되었다. 위 결과들로부터 경화 공정 중 발생하는 EMC의 유효 경화 수축이 측정되었다.
Recently, as the thickness of the semiconductor package becomes thinner, warpage has become a major issue. Since the warpage is caused by differences in material properties between package components, it is essential to precisely evaluate the material properties of the EMC(Epoxy molding compound), one of the main components, to predict the warpage accurately. Especially, the cure shrinkage of the EMC is generated during the curing process, and among them, the effective cure shrinkage that occurs after the gelation point is a key factor in warpage. In this study, the gelation point of the EMC was defined from the dissipation factor measured using the dielectric sensor during the curing process similar with actual semiconductor package. In addition, DSC (Differential scanning calorimetry) test and rheometer test were conducted to analyze the dielectrometry measurement. As a result, the dielectrometry was verified to be an effective method for monitoring the curing status of the EMC. Simultaneously, the strain transition of the EMC during the curing process was measured using the FBG (Fiber Bragg grating) sensor. From these results, the effective cure shrinkage of the EMC during the curing process was measured.
EMC (Epoxy molding compound), Cure shrinkage, Gelation point, Dielectrometry, FBG (Fiber Bragg grating) sensor
1Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul 03722, South Korea, 2School of Energy Materials and Chemical Engineering, Kyungpook National University, 2559 Gyeongsang-daero, Sangju 37224, South Korea
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 89-94.
고체상태에서 열에너지과 전기에너지를 직접적이고 가역적으로 변환할 수 있는 열전소재는 전기전도특성인 전기전도도 및 제벡계수와 열전도특성인 열전도도에 의해 그 성능이 결정된다. 하지만 전기전도도, 제벡계수, 열전도도는 소재의 조성, 결정구조 및 전자구조에 의해 결정되며, 서로 상관관계를 나타내기 때문에 성능 증대를 위한 효과적인 전략수립에 어려움이 있다. 본 논문에서는 열전소재의 성능과 관련한 수식에 대한 이해를 바탕으로 실험 결과와 연계하여 열전도도 저감 관점에서 효과적인 결함제어 기반 열전소재 성능 증대 전략을 수립할 수 있는 방법론을 제공하고자 한다.
Thermoelectric materials can directly convert a temperature gradient to an electrical energy and vice-versa, and their performance is determined by the electrical conductivity, Seebeck coefficient, and thermal conductivity. However, it is difficult to establish an effective strategy for enhancing performance since electrical conductivity, Seebeck coefficient, and thermal conductivity are strongly dependent on the composition, crystal structure, and electronic structure of the material, and show a correlation with each other. Herein, based on the understanding of the formulas related to the performance of thermoelectric materials, we provide a methodology to establish feasible defect engineering strategies of thermal conductivity reduction for improving the performance of thermoelectric materials in connection with the experimental results.
Thermoelectric, Formulaic understanding, Thermal conductivity, Defect engineering
Journal of the Microelectronics and Packaging Society, Vol. 29, No. , pp. 95-96.
1Department of Cogno-Mechatronics Engineering, College of Nanoscience and Nanotechnology, Pusan National University, 30 Jangjeon-dong, Geumjeong-gu, Busan 46241, Korea 2Department of Optics and Mechatronics Engineering, College of Nanoscience and Nanotechnology, Pusan National University, 30 Jangjeon-dong, Geumjeong-gu, Busan 46241, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 1-12.
본 논문에서는 레이저 유도에 의한 그래핀 합성 기술 및 이를 이용한 전기/전자 소자 제조 기술과 다양한 소자 제조 기술을 검토하였다. 최근까지 개발되고 있는 3차원 그래핀 구조 활용으로 설계된 마이크로/나노 패턴화는 효율적인 제조공정으로 인하여 많은 각광을 받고 있으며, 차세대 기판 소재로의 응용까지 다양하게 개발되고 있다. 산업에서 요구 하는 실제적인 적용 연구의 예들은, 레이저의 파장대역 선택, 출력 조정 및 광 간섭 기술 응용 등의 점진적인 해결방안 논 의를 통해 큰 발전 가능성을 보여주고 있다. 기존의 그래핀의 전기/전자 소자 장치로의 응용 확장성은 이미 검증된 바 있 으며, 새로운 합성 방식 및 기판 적용 기술은 마이크로 패키징 기술과의 통합 운용으로, 바이오센서, 슈퍼커패시터, 다공 성 전기화학 센서 등 응용분야가 매우 다양하다. 본 논문에서 소개하는 레이저 기반 그래핀 가공 기술은 가까운 미래에 휴대형 소형 전자기기 및 전자 소자에 쉽게 적용 가능하리라 사료된다.
Here, we introduce a laser-induced graphene synthesis technology and its applications for the electric/electronic device manufacturing process. Recently, the micro/nanopatterning technique of graphene has received great attention for the utilization of these new graphene structures, which shows progress developments at present with a variety of uses in electronic devices. Some examples of practical applications suggested a great potential for the tunable graphene synthetic manners through the control of the laser set-up, such as a selection of the wavelength, power adjustment, and optical techniques. This emerging technology has expandability to electric/electronic devices combined together with existed micropackaging technology and can be integrated with the new processing steps to be applied for the operation in the fields of biosensors, supercapacitors, electrochemical sensors, etc. We believe that the laser-induced graphene technology introduced in this paper can be easily applied to portable small electronic devices and wearable electronics in the near future.
graphene, laser, polyimide, 3D structure, wearable device
1Department of Advanced Chemicals & Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea 2Optoelectronics Convergence Research Center, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 13-20.
GaN은 III-V족 화합물 반도체로 밴드갭을 조절하는 것이 가능하고 화학적으로 안정하기 때문에 다른 물질에 비해 산성, 염기성 용액에서 부식이 적다. 또한 GaN의 밴드갭이 물의 산화·환원 준위를 포함하고 있어 외부전압 없이 물 분해가 가능하다는 장점이 있다. 하지만 GaN 자체만으로는 태양광-수소 변환 효율(solar-to-hydrogen conversion efficiency, STH)이 낮아 이를 개선하기 위해 최근 활발한 연구가 이루어지고 있다. 본 총설에서는 GaN을 PEC 물분해의 광전극으로 사용하기 위한 방법들과 연구에 대해 정리하였다.
GaN has shown good potential owing to its better chemical stability than other materials and tunable bandgap with materials such as InN and AlN. Tunable bandgap allows GaN to make the maximum utilization of the solar spectrum, thus improves the solar-to-hydrogen (STH) efficiency. In addition, GaN band gap contains the oxidation and reduction level of water, so it can split water without external voltage. However, STH efficiency using GaN itself is low and has been actively studied recently to improve it. In this thesis, we have summarized the studies related to the use of GaN as a photoelectrode for photoelectrochemical water splitting.
Gallium Nitride, Photoelectrode, Photoelectrochemical Water splitting
School of Advanced Materials Engineering, Jeonbuk Naional University, 567 Baekje-daero, Deokjin-gu, jeonju 54896, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 21-29.
Recently, semiconductor chips and electronic components are increasingly being used in IT devices such as wearable watches, autonomous vehicles, and smart phones. As a result, there is a growing concern about device malfunctions that may occur due to electromagnetic interference being entangled with each other. In particular, electromagnetic wave emissions from wearable or flexible smart devices have detrimental effects on human health. Therefore, flexible and transparent electromagnetic interference (EMI) shielding materials and films with high optical transmittance and outstanding shielding effectiveness have been gaining more attention. The EMI shielding films for flexible and transparent electronic devices must exhibit high shielding effectiveness, high optical transmittance, high flexibility, ultrathin and excellent durability. Meanwhile, in order to prepare this EMI shielding films, many materials have been developed, and results regarding excellent EMI shielding performance of a new materials such as carbon nano tube (CNT), graphene, Ag nano wire and MXene have recently been reported. Thus, in this paper, we review the latest research results to EMI shielding films for flexible and transparent device using the new materials.
Electromagnetic interference (EMI), Flexible, Transparent, 2D materials
Department of Materials Science and Engineering, University of Seoul, Seoul 130-743, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 31-37.
Sn-3wt%Ag-0.5wt%Cu (SAC305) solder is most popular solder in electronics industry. However, SAC305 has also drawbacks such as growth of β-Sn phase, intermetallic compounds (IMCs) of Ag3Sn, Cu6Sn5 and Cu3Sn which can result in deterioration of solder joints in terms of metallurgically, mechanically and electrically. Thus, improvement of SAC305 solders have been investigated continuously by addition of alloying elements, nano-particles and etc. In this paper, recent improvements of SAC solders including nano-composite alloys and related solderabilty and metallurgical and mechanical properties are investigated.
Sn-3wt%Ag-0.5wt%Cu solder, nano-composite solder, wetting, microstructure, tensile property
1School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do 36729, Korea 2Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 39-46.
Cu 배선(interconnect) 적용을 위한 다층박막의 적층 구조에 따른 최적 계면접착에너지(interfacial adhesion energy, Gc) 평가방법을 도출하기 위해, Ta, Cu 및 tetraethyl orthosilicate(TEOS-SiO2) 박막 계면의 정량적 계면접착에 너지를 double cantilever beam(DCB) 및 4-점 굽힘(4-point bending, 4-PB) 시험법을 통해 비교 평가하였다. 평가결과, Ta확산방지층이 적용된 시편(Cu/Ta, Cu/Ta/TEOS-SiO2)에서는 두 가지 평가방법 모두 반도체 전/후 공정에서 박리가 발 생하지 않는 산업체 통용 기준인 5 J/m2보다 높게 측정되었다. Ta/Cu 시편의 경우 DCB 시험에서만 5 J/m2보다 낮게 측정되었다. 또한, DCB시험 보다 4-PB시험으로 측정된 Gc가 더 높았다. 이는 계면파괴역학 이론에 따라 이종재료의 계면균열 선단에서 위상각의 증가로 인한 계면 거칠기 및 소성변형에 의한 에너지 손실이 증가 하는것에 기인한다. 4- PB시험결과, Ta/Cu 및 Cu/Ta계면은 5 J/m2 이상의 높은 계면접착에너지를 보이므로, 계면접착에너지 관점에서는 Ta는 Cu배선의 확산방지층(diffusion barrier layer) 및 피복층(capping layer)으로 적용 가능할 것으로 생각된다. 또한, 배선 집적공정 및 소자의 사용환경에서 열팽창 계수 차이에 의한 열응력 및 화학적-기계적 연마 (chemical mechanical polishing)에 의한 박리는 전단응력이 포함된 혼합모드의 영향이 크므로 4-PB 시험으로 측정된 Gc와 연관성이 더 클 것 으로 판단된다.
The quantitative measurement of interfacial adhesion energy (Gc) of multilayer thin films for Cu interconnects was investigated using a double cantilever beam (DCB) and 4-point bending (4-PB) test. In the case of a sample with Ta diffusion barrier applied, all Gc values measured by the DCB and 4-PB tests were higher than 5 J/ m2, which is the minimum criterion for Cu/low-k integration without delamination. However, in the case of the Ta/ Cu sample, measured Gc value of the DCB test was lower than 5 J/m2. All Gc values measured by the 4-PB test were higher than those of the DCB test. Measured Gc values increase with increasing phase angle, that is, 4-PB test higher than DCB test due to increasing plastic energy dissipation and roughness-related shielding effects, which matches well interfacial fracture mechanics theory. As a result of the 4-PB test, Ta/Cu and Cu/Ta interfaces measured Gc values were higher than 5 J/m2, suggesting that Ta is considered to be applicable as a diffusion barrier and a capping layer for Cu interconnects. The 4-PB test method is recommended for quantitative adhesion energy measurement of the Cu interconnect interface because the thermal stress due to the difference in coefficient of thermal expansion and the delamination due to chemical mechanical polishing have a large effect of the mixing mode including shear stress.
Cu interconnect, interfacial adhesion energy, 4-point bending test, double cantilever beam test, phase angle
1Department of Materials Science and Engineering, Dong-A University, Saha-Gu, Busan 49315, Korea 2Substrate Solution, Samsung Electro-Mechanics, Gangseo-Gu, Busan 46754, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 47-54.
미세화 되고 있는 PCB 솔더 범프 접합을 위해 종래 마이크로 볼에 의한 PCB 솔더 범프의 제조를 대신하여 주석 전기도금을 통한 패턴을 제작하기 위한 도금액을 제작하고 도금공정 조건을 찾는 실험을 진행하였다. SR 패터닝 후 에 Cu 씨드층을 형성하고, 다시 DFR 패터닝을 통해 PCB 기판상에 선택성장이 가능한 패턴을 제작하였다. 도금액은 메 탄술폰산을 기본액으로 하는 주석도금액을 사용하였으며, 2가의 주석이온의 산화를 방지하기 위해 hydroquinone을 첨가 하였다. 표면활성제로는 Triton X-100를 사용하고, 결정립 미세화를 위해 gelatin을 첨가하여 시료를 제작하였다. 전기화 학적 분극곡선을 측정함으로써, Triton X-100 및 gelatin 첨가제의 작용 특성을 비교하였으며, gelatin이 -0.7 V vs. NHE 까지 수소발생을 억제하는 것에 비해 Triton X-100을 첨가하게 되면 -1 V vs. NHE까지 수소발생이 억제되는 것을 확인 할 수 있었다. 결정립의 크기는 전류밀도가 증가하면서 미세화되는 일반적 경향을 나타내었으며, gelatin을 첨가하는 경 우에 보다 더 미세해지는 것이 관찰되었다.
For the bonding of smaller PCB solder bumps of less than 100 microns, an experiment was performed to make up a tin plating solution and find plating conditions in order to produce a bump pattern through tin electroplating, replacing the previous PCB solder bumps process by microballs. After SR patterning, a Cu seed layer was formed, and then, through DFR patterning, a pattern in which Sn can be selectively plated only within the SR pattern was formed on the PCB substrate. The tin plating solution was made based on methanesulfonic acid, and hydroquinone was used as an antioxidant to prevent oxidation of divalent tin ions. Triton X-100 was used as a surfactant, and gelatin was used as a grain refiner. By measuring the electrochemical polarization curve, the characteristics of organic additives in Triton X-100 and gelatin were compared. It was confirmed that the addition of Triton X-100 suppressed hydrogen generation up to -1 V vs. NHE, whereas gelatin inhibited hydrogen generation up to -0.7 V vs. NHE. As the current density increased, there was a general tendency that the grain size became finer, and it was observed that it became finer when gelatin was added.
electroplating, tin, Triton X-100, gelatin, electron backscattering diffraction (EBSD)
1Department of Chemicals Engineering, Chonnam National University, 77 Yongbong-ro, Buk-gu, Gwangju 61186, Korea 2Energy Convergence Core Facility, Chonnam National University, 77 Yongbong-ro, Buk-gu, Gwangju 61186, Korea 3Next generation LED research Center, Korea Photonics Technology Institute, Buk-gu, Gwangju 61007, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 55-60.
유연한 특성을 유지하면서 높은 접착력을 가진 웨어러블 디스플레이를 제작하기 위하여 전해도금법을 이용한 접착법을 진행하였다. 또한 섬유에 접착된 LED의 사파이어 기판을 제거하기 위하여 LLO 전사법을 이용하였다. 그 후 전해도금을 이용한 접착법을 진행한 샘플의 SEM, EDS 데이터를 통하여 실제로 구리가 섬유직물의 격자사이를 관통하 여 성장하며 광원과 섬유를 고정시켜주는 것을 확인하였다. 구리의 접착특성을 확인하기 위하여 Universal testing machine (UTM)을 이용하여 측정하였다. 도금 접착 후 laser lift-off (LLO) 전사공정을 완료한 샘플과 전사공정을 진행하 지 않은 LED의 특성을 probe station을 이용하여 비교하였다. 공정 이후의 광원의 특성을 확인하기 위하여 인가 전류에 따른 electroluminescence (EL)을 측정하였다. 전류가 증가할수록 온도가 상승하여 Bandgap이 감소하기 때문에 spectrum 이 천이하는 것을 확인하였다. 또한 radius 변화에 따른 샘플의 전기적 특성 변화를 probe station을 이용하여 확인하였다. Radius 변형에도 구리가 bending stress를 견딜 수 있는 기계적 강도를 가지고 있어 Vf 변화는 6% 이하로 측정되었다. 이 러한 결과를 토대로 웨어러블 디스플레이 뿐만 아니라 유연성이 필요한 배터리, 촉매, 태양전지 등에 적용되어 웨어러블 디바이스의 발전에 기여할 수 있을 것으로 기대한다.
In order to produce wearable displays with high adhesion while maintaining flexible characteristics, the adhesive method using electro plating method was carried out. Laser lift-off (LLO) transcription was also used to remove sapphire substrates from LEDs bonded to fibers. Afterwards, the SEM and EDS data of the sample, which conducted the adhesion method using electro plating, confirmed that copper actually grows through the lattice of the fiber fabric to secure the light source and fiber. The adhesion characteristics of copper were checked using Universal testing machine (UTM). After plating adhesion, the characteristics of the LLO transcription process completed and the LED without the transcription process were compared using probe station. The electroluminescence (EL) according to the enhanced current was measured to check the characteristics of the light source after the process. As the current increases, the temperature rises and the bandgap decreases, so it was confirmed that the spectrum shifted. In addition, the change in the electrical characteristics of the samples according to the radius change is confirmed using probe station. The radius strain also had mechanical strength that copper could withstand bending stress, so the Vf variation was measured below 6%. Based on these results, it is expected that it will be applied to batteries, catalysts, and solar cells that require flexibility as well as wearable displays, contributing to the development of wearable devices.
LED, Fabric, Electro plating, Laser lift off, Wearable display, Plating adhesion
Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 61-66.
SnO2는 3.6 eV를 갖는 반도체 물질로 광촉매 특성을 보유하고 있는 물질이다. 광촉매 특성을 극대화하기 위 해 3차원 에어로겔 화를 통하여 높은 비표면적을 확보하고자 epoxide-initiated sol-gel method를 기반으로 하여 주석 산 화물 에어로겔을 합성하였다. 좀더 향상된 비표면적을 구현하고자 합성공정 중 겔화전에 graphene oxide (GO) flake의 첨가를 통해 정렬된 기공구조와 결과적으로 높은 비표면적을 확보할 수 있었다. 0.5 wt%의 GO flake의 첨가로 에어로겔 복합체의 비표면적을 약 1.7배 향상시키는 결과를 도출하였다. 이렇게 향상된 비표면적을 기반으로 Rhodamine B 염료 의 분해효과를 흡수광 intensity 변화를 관찰하여 정성적으로 광촉매 효율을 비교 분석하였다. 가장 높은 비표면적을 갖 는 0.5 wt%의 복합체는 120분에 67.3%의 분해 효율을 확보하였다. 또한, GO를 첨가하지 않은 SnO2 에어로겔 보다 약 2 배 향상된 reaction rate를 보유하였다.
SnO2 has the wide bandgap which allows it to be used as the photocatalyst. There are many studies to enhance the photocatalytic properties of SnO2. In this study, 3-dimensional SnO2 aerogel was synthesized using epoxide-initiated sol-gel method for the optimal specific surface area. Also, graphene oxide (GO) was added before the gelation process of the aerogel to maximize the specific surface area. Addition of 0.5 wt% of GO would possibly enhance the specific surface area by 1.7 times compared with the bare tin oxide aerogel. Furthermore, enhanced specific surface area could degrade 67.3% of initial Rhodamine B in 120 minutes. To compare with the bare SnO2 aerogel, 0.5 wt% GO addition to SnO2 could double the reaction rate of the photocatalytic degradation.
Photocatalyst, Aerogel, SnO2, Graphene oxide
1Department of Advanced Chemicals & Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea 2Department of Metallurgical Engineering, Dong-A University, Busan 49315, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 67-71.
본 연구에서는 금속 와이어를 촉매로 화학기상증착법을 이용하여 그래핀을 합성하고 구조 및 전기적 특성 변 화를 분석하였다. 구리와 니켈의 탄소에 대한 용해도 차이로 인해 구리와이어에서는 단층 그래핀이 성장하였고, 니켈와 이어의 표면에는 다층 그래핀이 성장되었다. 또한. 고온의 그래핀 성장 조건에서 구리와 니켈의 재결정화를 통해 결정립 의 크기가 증가한 것을 확인하였다. 표면에 그래핀이 합성된 구리와이어의 경우, 최대전류허용치는 1.91×10 5A/cm2으로 합성 전 구리와이어에 비해 약 27% 향상되었다. 이와 유사하게, 다층 그래핀이 합성된 니켈와이어의 경우에도 최대전류 허용치는 순수한 니켈와이어 대비 약 36% 향상된 4.41×104 A/cm2으로 측정되었다. 이러한 그래핀/금속 복합소재의 우수 한 전기적 특성은 고전류를 요구하는 소자 및 부품에서 안정적인 전기적 흐름을 공급하는데 기여할 수 있을 것이다.
In this study, graphene layer was grown on metal microwire using chemical vapor deposition. The difference of carbon solubility between copper and nickel resulted in the formation of mono-layer and multi-layer graphene were formed on the surfaces of copper and nickel microwires, respectively. During the growth of graphene at high temperature, copper and nickel were recrytallized and the grain size increased. The ampacity of graphene/copper microwire was improved by approximately 27%, 1.91×105 A/cm2, compared to pristine copper microwire. Similar to this behavior, the ampacity of multilayer graphene/nickel microwire was 4.41×104 A/cm2 which is about about 36% improved compared to the pure nickel microwire. The excellent electrical properties of graphene/metal composites are beneficial for supplying the electrical energy to the high-power electronic devices and equipment.
Graphene, Metal, Chemical vapor deposition, Electrical properties, Ampacity
School of Advanced Materials Engineering, Dong-Eui University, 176 Eomgwangro, Busan 47340, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 73-77.
In this study, we report on the effects of argon plasma treatment on Ag nanowires by varying the power and duration. Sheet resistance was found to be significantly reduced to 10 ohm/sq. relative to the value of 21 ohm/sq. for the pristine sample. Such a reduction was found to be associated with welded junctions between Ag nanowires, which results in enhanced current flow. With the optimized plasma treatment conditions, the maximum and average transmittance were 76.8% and 71%, respectively. Finally, we fabricated transparent heating devices based on the methodology, which exhibited superior heating capability.
Sputtering, Thin Films, Transparent Electrodes, Sheet Resistance, Transmittance
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 79-79.
1Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea 2Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 1-12.
3차원 인쇄 기술은 제품의 설계를 3차원으로 하여 조립없이 제품의 생산까지의 시간을 획기적으로 줄이고 복잡한 구조도 구현할 수 있어 미래의 기술로 각광받고 있다. 본 논문은 3차원 인쇄기술을 이용한 전자소자에 대한 최 근 연구동향을 알아보면서 구성품, 전원공급장치와 회로에서의 연결과 3차원 인쇄기술 PCB의 응용한 연구논문들을 소 개하고 있다. 3차원 인쇄기술로 제작한 전자소자는 원스톱으로 전자소자, 솔더링(soldering), 스태킹(stacking), 회로의 봉지막(encapsulation)까지 제작함으로써 생산설비의 단순화와 전자기기를 개인 맞춤형을 할 수 있는 가능성을 보여주 었다.
3D printing, which designs product in three dimensions, draws attention as a technology that will lead the future for it dramatically shortens time for production without assembly, no matter how complex the structure is. The paper studies the latest researches of 3D-printed electronics and introduces papers studied electronics components, power supply, circuit interconnection and 3D-printed PCBs’ applications. 3D-printed electronics showed possibility to simplify facilities and personalize electric devices by providing one-stop printing process of electronic components, soldering, stacking, and even encapsulation.
3D printing, 3D-printed electronics, 3D-printed PCB, Additive Manufacturing
1Department of Materials Science and Engineering, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea 2Research Institute of Advanced Materials, Seoul National University, 1, Gwanak-ro, Gwanak-gu, Seoul 08826, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 13-28.
트랜지언트 전자소자는 전해질 수용액이나 체내와 같은 거친 환경에서도 작동이 가능하며 동작 이후 가수분 해되어 스스로 제거되기 때문에 기존의 전자소자를 대체하여 의료 목적의 체내 삽입 소자 등 다양한 연구 영역에서 활용 되고 있다. 또한 물과 효소만으로 제거가 가능한 트랜지언트 전자소자는 최근 대두되고 있는 전자 쓰레기와 환경 오염 문 제를 해결할 수 있는 신개념 그린 테크놀로지로 많은 주목을 받고 있다. 하지만, 트랜지언트 전자소자의 작동 환경인 수 용액과 체내는 지속적은 물 침투를 통해 소자 내 핵심 부품을 열화시킨다. 이러한 환경 내 안정한 동작을 위하여 수동적 보호 기능을 가진 피막이 소자 외부를 감싸는 봉지막 전략이 도입되었다. 본 논문에서는 트랜지언트 전자소자의 등장 배 경과 분해 거동을 포함한 최근 연구 동향과 작동 환경 내 물 침투를 방지하여 동작 신뢰도를 향상시킬 수 있는 봉지막 전 략에 관하여 정리하였다.
Since transient electronic devices can operate under harsh conditions such as electrolytic solutions or inside the body, and be removed by hydrolysis after operation, they can replace conventional electronic devices in various research areas like biomedical implantable devices. Moreover, transient electronic devices that can dissolve in water and enzymes are the focus of the new concept of green technology, which can solve electrical waste issues. However, the surroundings of transient electronic devices can deteriorate internal device components. Thus, an encapsulation strategy is introduced for stable operation in solution by shielding the outside of a device with a passive barrier. This article summarizes recent research trends in transient electronic devices, including their background, dissolution behavior, and encapsulation strategies to enhance reliability by blocking water permeation.
Transient electronics, Bioresorbable electronics, Ecofriendly electronics, Electronic encapsulation, Device reliability
1School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do, 36729, Korea 2Graduate School of Nano-IT Design Convergence, Seoul National University of Science and Technology, 232, Gongneung-ro, Nowon-gu, Seoul 01811, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 29-37.
3 차원 패키징을 위한 저온 Cu-Cu직접 접합부의 계면접착에너지를 향상시키기 위해 Cu박막 표면에 대한 Ar/ N2 2단계 플라즈마 처리 전, 후 Cu표면 및 접합계면에 대한 화학결합을 X-선 광전자 분광법(X-ray photoelectron spectroscopy)을 통해 정량화한 결과, 2단계 플라즈마 처리로 인해 Cu표면에 Cu4N이 형성되어 Cu산화를 효과적으로 억 제하는 것을 확인하였다. 2단계 플라즈마 처리하지 않은 Cu-Cu시편은 표면 산화막의 영향으로 접합이 제대로 되지 않았 으나 2단계 플라즈마 처리한 시편은 효과적인 표면 산화방지효과로 인해 양호한 Cu-Cu접합을 형성하였다. Cu-Cu직접 접합 계면의 정량적 계면접착에너지를 double cantilever beam 시험방법 및 4점 굽힘(4-point bending, 4-PB) 시험방법을 통해 비교한 결과, 각각 1.63±0.24, 2.33±0.67 J/m2으로 4-PB 시험의 계면접착에너지가 더 크게 측정되었다. 이는 계면파 괴역학의 위상각(phase angle)에 따른 계면접착에너지 증가 거동으로 설명할 수 있는데 즉, 4-PB의 계면균열선단 전단응 력성분 증가로 인한 계면거칠기의 효과에 기인한 것으로 판단된다.
The effect of Ar/N2 two-step plasma treatment on the quantitative interfacial adhesion energy of low temperature Cu-Cu bonding interface were systematically investigated. X-ray photoelectron spectroscopy analysis showed that Ar/N2 2-step plasma treatment has less copper oxide due to the formation of an effective Cu4N passivation layer. Quantitative measurements of interfacial adhesion energy of Cu-Cu bonding interface with Ar/N2 2-step plasma treatment were performed using a double cantilever beam (DCB) and 4-point bending (4-PB) test, where the measured values were 1.63±0.24 J/m2 and 2.33±0.67 J/m2, respectively. This can be explained by the increased interfacial adhesion energy according phase angle due to the effect of the higher interface roughness of 4-PB test than that of DCB test.
Cu-to-Cu direct bonding, Ar/N2 plasma, 4-point bending test, double cantilever beam test
ICT · device packaging Research Center, Korea Electronics Technology Institute (KETI), Bundang-gu, Seongnam-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 39-44.
본 논문에서는 밀리미터파 대역에서 헤어핀 타입과 인터디지털 타입 두 종류의 대역통과필터(BPF)를 LCP(Liquid Crystal Polymer)와 PTFE(Polytetrafluoroethylene) 두 종류의 기판을 이용하여 설계 하고 성능을 비교하였다. 제안된 BPF의 통과 대역은 26.5 GHz~27.3 GHz 대역이며, 필터의 차수는 3차로 선택하였다. 제안된 BPF의 성능 비교 는 기판 종류와 타입에 따른 대역폭(Bandwidth)과 통과 대역 내 삽입손실(Insertion Loss)과 평탄도(in-band Flatness) 등 을 비교하였다. S21이 -3 dB가 되는 대역폭을 비교하였을 때 제안된 4 개의 BPF 중 PTFE 기판에 설계된 인터디지털 타 입이 7.8 GHz로 가장 넓게 설계되었으며, LCP 기판에 설계된 헤어핀 타입 BPF가 4.2 GHz로 가장 협소한 대역폭을 가 지는 것으로 나타났다. 통과 대역 내 삽입손실은 PTFE 기판에 설계된 헤어핀 타입 BPF가 -0.667 dB 이상으로 가장 우 수하고 LCP 기판에 설계된 헤어핀 타입 BPF가 -0.937 dB 이상으로 가장 낮았으나, 0.27 dB의 근소한 차이임을 확인했 다. 통과 대역 내 평탄도의 경우 PTFE 기판에 설계된 인터디지털 타입 BPF가 0.017 dB로 가장 우수하였고, LCP 기판 에 제작된 헤어핀 타입이 0.07 dB로 가장 낮았으나 0.053 dB의 근소한 차이였다. 따라서, 밀리미터파 대역에서 LCP 기 판을 이용한 대역통과 필터는 PTFE 기판을 이용한 대역통과필터와 비슷한 성능을 도출할 수 있을 것으로 사료된다.
In this paper, two types of BPF(Band Pass Filter) which are hair-pin and interdigital have been designed for millimeter-wave application using two types of material which are LCP(Liquid Crystal Polymer) and PTFE(Polytetrafluoroethylene) and also, their performances such as bandwidth, insertion loss, and in-band flatness are compared. The proposed BPF are designed as third-order filters, and their pass band is from 26.5 GHz to 27.3 GHz. Interdigital BPF using PTFE substrate has most wide -3 dB S21 bandwidth of 7.8 GHz and hair-pin BPF using LCP substrate has most narrow -3 dB S21 bandwidth among the proposed four BPF. For in-band insertion loss, hair-pin BPF using PTFE substrate achieves low insertion loss better than -0.667 dB, and hair-pin BPF using LCP substrate exhibits relatively high insertion loss among the proposed four BPF better than -0.937 dB. However, the maximum difference in insertion loss performance among the proposed four BPF is 0.27 dB, which is too small to negligible. For in-band flatness, interdigital BPF using PTFE substrate shows greatest performance of 0.017 dB, and hair-pin BPF using LCP substrate exhibits the lowest performance of 0.07 dB. There are tiny difference in in-band flatness performance of 0.053 dB. As a results, it is considered that the BPF using LCP substrate can derive the performances similar to that of the BPF using PTFE substrate in Millimeter-wave band.
BPF, LCP, PTFE, Millimeter-wave
PKG Development, SK Hynix Co., 2091, Gyeongchung-daero, Bubal-eup, Icheon-si, Gyeonggi-do, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 45-50.
Flip chip 제품의 난이도 증가에 따라 solder wetting 및 신뢰성 관점에서 강점을 갖는 flux 소재에 대한 관심 이 높아지고 있다. 지용성 flux의 경우 별도의 세정 공정이 없기 때문에 공정 효율화 측면에서 유리하나, 리플로우 공정 이후 반응을 마친 잔여물이 잔존하게 되는 경우 Cu migration 및 delamination을 발생시킬 수 있다. 본 연구에서는 저잔 사 flux 구현을 위해 신규 resin에 적합한 solvent 및 activator를 변경 하였으며, package 환경에서 non-wet 및 신뢰성 개 선 유무를 확인하였다. 저장 안정성 평가를 통해 신규 소재에 대한 안정성을 확보하였으며, boiling point가 상이한 solvent 와 activator 2종 적용 및 activator 함량 증대를 통해 non-wet 미 발생 flux 소재를 확보하였다. 해당 소재에 대한 신뢰성 검증 이후 평면 분석 결과 flux residue 기인성 delamination 현상은 발견되지 않았으며, 이를 통해 저잔사 flux에 대한 최 종 조성을 확보하였다.
As the difficulty of flip chip products increases, there is a growing interest in the material of flux, which is safe from the solder wetting and reliability. In the case of no clean flux, there is merit in terms of process efficiency because there is no cleaning process. But Cu migration and delamination can be occurred if the residue remains after the reflow process. In this study, major element materials, solvent and activator, are changed and confirmed effect of nonwet and reliability in the package environment. Stability of materials were secured through storage stability evaluation, and we found out non-wet zero materials through the application of two types of solvent and activator with different boiling point and the increase of activator content. After reliability test, no delamination was found in the plane analysis, which secured the final composition of low residue flux.
Flip chip, No clean, Low residue flux, Non-wet, Delamination
1Department of Mechanical Engineering, Inha University, 100 Inha-ro, Nam-gu, Incheon, Korea 2Korea Aerospace Research Institute, Daejun, Korea 3Department of Mechatronics Engineering, Inha University, 100 Inha-ro, Nam-gu, Incheon, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 51-57.
이 연구에서는 에폭시 수지에 포함된 나노 실리카 입자의 농도가 재료의 열/기계적 물성에 미치는 영향에 대 해 알아보았다. 약 12 nm 크기의 나노 입자를 에폭시 수지에 다섯가지 무게비로 섞은 나노복합소재를 제작하였다. DMA 와 TMA 방법을 이용하여 유리전이온도, 응력이완, 열팽창 거동을 측정하였다. 이를 통해 나노입자가 재료의 점탄성 거 동에 어떠한 영향을 미치는지 보였다. 실리카 입자의 함량이 증가할수록 순수 에폭시 재료 대비 탄성 물성은 증가하였고, 유리전이온도는 감소하였다. FTIR 결과는 분자구조의 관점에서 충진제 함량에 따른 물성변화의 원인을 찾고 나노입자가 에폭시 분자 구조에 어떠한 영향을 미치는지를 규명하는데 중요한 역할을 하였다.
This paper analyzed the effects of the concentration of nano-silica particles contained in epoxy resin on the thermomechanical properties of the composite materials. The 12nm sized nanoparticles were mixed with epoxy polymer by 5 different weight ratios for the test samples. The glass transition temperature, stress relaxation, and thermal expansion behaviors were measured using dymanic mechanical analyzer (DMA) and thermomechanical analyzer (TMA). It was shown that the nano particle mixing ratios had significant influences on the viscoelastic behaviors of the materials. As the content of the silica particles was increased, the elastic modulus was also increased, while the glass transition temperatures were decreased. Fourier Transform Infrared Spectroscopy (FTIR) results played an important role in determining the causes of the property changes by the filler contents in terms of the molecular structures, enabling the interpretations on the material behaviors based on the chemical structure changes.
Epoxy, Nano Composite, Material Properties, Viscoelasticity
1Department of Protection and Safety Engineering, Seoul National University of Science and Technology, Seoul 01811 Korea 2 Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 59-64.
차세대 반도체 기술은 이종소자 집적화(heterogeneous integration)를 이용한 시스템-인-패키징(system-inpackage, SIP) 기술로 발전하고 있고, 저온 Cu 본딩은 SIP 구조의 성능 향상과 미세 피치 배선을 위해서 매우 중요한 기 술이라 하겠다. 본 연구에서는 porous한 Ag 나노막을 이용하여 Cu 표면의 산화 방지 효과와 저온 Cu 본딩의 가능성을 조사하였다. 100oC에서 200oC의 저온 영역에서 Ag가 Cu로 확산되는 것보다 Cu가 Ag로 확산되는 것이 빠르게 관찰되 었고, 이는 저온에서 Ag를 이용한 Cu간의 고상 확산 본딩이 가능함을 나타내었다. 따라서 Ag 나노막을 이용한 Cu 본딩 을 200oC에서 진행하였고, 본딩 계면의 전단 강도는 23.27 MPa로 측정되었다.
System-in-package (SIP) technology using heterogeneous integration is becoming the key of next-generation semiconductor packaging technology, and the development of low temperature Cu bonding is very important for highperformance and fine-pitch SIP interconnects. In this study the low temperature Cu bonding and the anti-oxidation effect of copper using porous Ag nanolayer were investigated. It has been found that Cu diffuses into Ag faster than Ag diffuses into Cu at the temperatures from 100oC to 200oC, indicating that solid state diffusion bonding of copper is possible at low temperatures. Cu bonding using Ag nanolayer was carried out at 200oC, and the shear strength after bonding was measured to be 23.27 MPa.
Ag nanolayer, Cu bonding, 3D packaging, metal passivation, solid state diffusion
1Korea Institute of Industrial Technology (KITECH), 156, Gaetbeol-ro, Yeonsu-gu, Incheon 21999, Korea 2School of Materials Science and Engineering, Andong National University, 1375, Gyeongdong-ro, Andong-si, Gyeongsangbuk-do 36729, Korea 3Industrial Technology, University of Science and Technology (UST), Daejeon 34113, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 65-70.
본 연구에서는 레이저 접합 공정을 이용하여 flame retardant-4 (FR-4) 인쇄회로기판 (printed circuit board, PCB)의 organic solderability preservative (OSP) 표면처리 된 Cu pad와 전자부품을 Sn-57Bi-1Ag 저온 솔더 페이스트로 접합을 한 후 접합부의 계면 특성과 기계적 특성에 대하여 보고 하였다. 레이저 접합 공정은 레이저 파워 및 시간 등을 다르게 진행하여 접합 공정 조건이 접합부의 계면 및 기계적 특성에 미치는 영향을 살펴보았다. 레이저 접합 공정의 산 업적 적용을 위하여 산업적으로 많이 이용되고 있는 리플로우 접합 공정을 이용한 접합부의 특성과도 비교 하였다. 레이 저 접합 공정 적용 결과 2, 3 s의 짧은 공정 시간에도 계면에 Cu6Sn5 금속간화합물 (intermetallic compound, IMC)를 생 성하여 접합부를 안정적으로 형성함을 확인 하였다. 또한, 리플로우 공정과 비교해 보았을 때 레이저 접합 공정을 적용할 경우 접합부의 보이드 형성이 억제됨을 확인할 수 있었으며 접합부의 전단강도도 리플로우 공정 접합부보다 높은 기계 적 강도를 나타냈다. 따라서, 레이저 접합 공정을 적용할 경우 짧은 접합 공정 시간에도 불구하고 안정적인 접합부 형성 및 높은 기계적 강도를 확보할 수 있는 것으로 기대된다.
In this study, interfacial properties and mechanical properties of joints were reported after Cu pads finished with organic solderability preservative (OSP) on flame retardant-4 (FR-4) printed circuit board (PCB) and electronic components were joined with a Sn-57Bi-1Ag solder paste by using a laser bonding process. The laser bonding process was performed under various bonding conditions with changing a laser power and a bonding time and effects of bonding conditions on interfacial and mechanical properties of joints were analyzed. In order to apply for industry, properties of bonding joints using a reflow bonding process which are widely used were compared. When the laser bonding process were performed, we observed that Cu6Sn5 intermetallic compounds (IMCs) were fully formed at the interface although the bonding times were very short about 2 and 3 s. Furthermore, void formations of the joints by using the laser bonding process were suppressed at the joints with comparing to the reflow bonding process and shear strengths of bonding joints were higher than that by using the reflow bonding process. Therefore, in spite of a very short bonding time, it is expected that joints will be stably formed and have a high mechanical strength by using the laser bonding process.
interfacial property, mechanical property, Sn-57Bi-1Ag, laser bonding, Cu OSP, intermetallic compound
1Department of Advanced Materials Engineering, Chungbuk National University 2Electric Power Conversion Engineering Design Team, Automotive Research & Development Division, Hyundai Motor Group
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 71-79.
본 연구에서는 고온 대응 EV (Electric Vehicle) 전력반도체 칩 접합용 Sn-Ni 페이스트의 제조 및 특성 평가 연 구가 수행되었다. Sn-Ni 페이스트의 Sn과 Ni 함량에 따른 TLPS (Transient Liquid Phase Sintering) 접합부 미세 조직 변 화 관찰 결과, Sn-20Ni (in wt.%)의 경우에는 Ni 분말의 부족, 그리고 Sn-50Ni의 경우에는 Ni 분말의 과다 포함에 따른 Ni 뭉침 현상이 관찰되었다. Sn-30Ni과 Sn-40Ni의 경우에는 TLPS 접합 공정 후 상대적으로 치밀한 접합부 단면 미세 구 조 조직을 가짐을 확인하였다. TLPS 접합 공정 후 접합부 시편의 DSC 열 분석 결과로부터 TLPS 접합 공정 반응 동안 Sn과 Ni의 충분한 반응이 일어남을 확인하였으며, 접합 공정 후 접합부에는 Sn이 남아 있지 않음을 확인하였다. 추가적 으로 공정 온도 변화에 따른 Sn-30Ni TLPS 접합부의 계면반응 및 기계적 강도 시험이 수행되었다. TLPS 접합 공정 후 접합부는 Ni-Sn 금속간화합물과 반응하고 남은 Ni 분말들로 구성되었으며, 접합 온도가 증가함에 따라 접합부 칩 전단 강도는 증가하였다. 솔더링 온도와 유사한 270 oC의 접합 온도에서 30분 동안의 TLPS 접합 공정 수행 후 약 30 MPa의 높은 칩 전단 강도 값을 얻었다.
In this study, we have successfully fabricated the Sn-Ni paste and evaluated the bonding properties for hightemperature endurable EV (Electric Vehicle) power module applications. From evaluating of the micro-structural changes in the TLPS (Transient Liquid Phase Sintering) joints with Sn and Ni contents in the Sn-Ni pastes, a lack of Ni powders and Ni particle agglomerations by Ni surplus were observed in the Sn-20Ni and Sn-50Ni joints (in wt.%), respectively. In contrast, relatively dense microstructures are observed in the Sn-30Ni and Sn-40Ni TLPS joints. From differential scanning calorimetry (DSC) thermal analysis results of the fabricated Sn-Ni paste and TLPS bonded joints, we confirmed that the complete reactions of Sn with Ni to form Ni-Sn intermetallic compounds (IMCs) at bonding temperatures occurred, and there is no remaining Sn in the joints after TLPS bonding. In addition, the interfacial reactions and IMC phase changes of the Sn-30Ni joints under various bonding temperatures were reported, and their mechanical shear strength were investigated. The TLPS bonded joints were mainly composed of residual Ni particles and Ni3Sn4 intermetallic phase. The average shear strength tended to increase with increasing bonding temperature. Our results indicated a high shear strength value of approximately 30 MPa at a bonding temperature of 270 oC and a bonding time of 30 min.
Sn-Ni paste, Transient liquid phase sinter bonding, liquid-solid reactions, Intermetallics, Chip bonding
ICT · Device Packaging Research Center, Korea Electronics Technology Institute (KETI), Bundang-gu, Seongnam-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 81-88.
본 논문에서는 LTCC(Low Temperature Co-fired Ceramic) 기판을 적용하여 24 GHz 대역 회로에서 활용될 수 있는 수동소자 라이브러리를 구현하였다. 회로에서 사용 목적에 따라 큰 용량 값의 수동소자가 필요하며, 기본 구조인 전 극 커패시터와 Spiral 구조 인덕터로 설계할 수 있지만, SRF(Self-Resonant Frequency)가 사용 주파수인 24 GHz 보다 낮 아 고주파 영역에서는 활용이 불가능하다. 이러한 주파수 한계를 해결하기 위해, DC와 고주파 영역 사용 수동소자를 분 류하여 제안하였다. 기본 구조는 DC와 같은 1~2 GHz 미만의 낮은 주파수 사용에 적합하다. 24 GHz 대역인 고주파용으 로는 마이크로스트립 λ/8 길이 stub 구조를 제안하였고, open 및 short stub 구조는 각각 커패시터 및 인덕터로 동작하고, stub 고유의 임피던스 값을 가진다. 여기서 임피던스 계산식을 통해 수동소자 용량 값을 얻을 수 있다. 본 논문에서 고안 한 수동소자는 유전율 7.5인 LTCC 기판으로 제작하고 측정하여, DC 사용 기본 구조 커패시터와 인덕터는 각각 2.35~30.44 pF, 0.75~5.45 nH 용량의 라이브러리를 구성하였다. 고주파 영역에서 사용 가능한 stub 구조의 커패시터와 인 덕터는 각각 0.44~2.89 pF, 0.71~1.56 nH 으로 라이브러리를 구축하였다. 측정을 통해 용량 값을 다양화하는 방법을 검 증하였으므로 더욱 세분화된 라이브러리를 구현할 수 있으며, 사용 주파수 24 GHz 대역의 레이더 모듈에서 다층 기판 동작 회로와 집적화할 수 있는 수동소자의 대안이 될 것이다.
In this paper, by applying LTCC substrate, the library of the passive elements is implemented. And it can be used in 24 GHz circuits. Depending on how to use it to the circuit, it is required large value by designing the basic structures such as electrode capacitor and spiral inductor. However they are not available in high-frequency domain, because their SRF(Self-Resonant Frequency) is lower than the frequency of 24-GHz. By solving the limit, this paper devised passive elements classified for the DC and the high-frequency domain. The basic structure is suitable for low frequency under 1~2 GHz like DC. The microstrip λ/8 length stub structure is proposed to use for high-frequency like 24-GHz. The open and short stub structure operate as a capacitor and inductor respectively, also they have their impedances. Through their impedances, we can extract the value with the impedance-related equation. In this paper, the proposed passive elements are produced with the permittivity 7.5 LTCC substrate, the basic structure which are available in the DC constituted a library of capacitance of 2.35 to 30.44 pF and inductance of 0.75 to 5.45 nH, measured respectively. The stub structure available in the high-frequency domain were built libraries of capacitance of 0.44 to 2.89 pF and inductance of 0.71 to 1.56 nH, calculated respectively. The measurements have proven how to diversify value, so libraries can be built more variously. It will be an alternative to the passive elements that it is possible to integrate with the operation circuit of radar module for the frequency 24-GHz.
LTCC, passive element, capacitor, inductor, stub
12 Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 89-94.
최근 플렉시블 기기의 상용화를 위하여 기계적 신뢰성 연구가 활발히 진행되고 있으며 이를 고려하여 신뢰성 높은 다양한 접합부의 구현이 중요하다. 기기의 많은 부피를 차지하는 고분자 기판 또는 필름을 접합할 때에는 재료의 약 한 내열성으로 접합공정 중 열 손상이 발생할 수 있으므로 신뢰성을 확보를 위해 상온 접합공정이 필요하다는 제약이 있 다. 기존의 기판 접합을 위해 사용되는 에폭시 또한 고온 경화가 요구되는 경우가 많고, 특히 경화 접합 후 에폭시는 접 합부 유연성 및 피로 내구성에서 한계를 보인다. 이를 해결하기 위하여 접착제 사용이 없는 저온 접합 공정의 개발이 필 요한 상황이다. 본 연구에서는 마이크로파에 의한 탄소나노튜브 가열을 이용한 고분자 기판의 저온 접합공정을 개발하였 다. PET 고분자 기판에 다중벽 탄소나노튜브 (MWNT)를 박막 코팅한 뒤 이를 마이크로파로 국부 가열함으로써 접합 기 판 전체는 저온을 유지하며 CNT-PET 기계적 얽힘을 유도하는 방식이다. PET/CNT/PET 접합시편에 600 Watt 출력의 마 이크로파를 10초간 조사함으로써 유연기판 접합에 성공하였고 매우 얇은 CNT 접합부를 구현하였다. 접합 시편의 기계 적 신뢰성을 평가하기 위해 중첩 전단 강도 시험, 삼점 굽힘 시험, 반복 굽힘 시험을 수행하였으며 각 시험으로부터 우수 한 접합강도, 유연성, 굽힘 내구성이 확인되었다.
The mechanical reliability of flexible devices has become a major concern on their commercialization, where the importance of reliable bonding is highlighted. In terms of component materials’ properties, it is important to consider thermal damage of polymer substrates that occupy large area of the flexible device. Therefore, room temperature bonding process is highly advantageous for implementing flexible device assemblies with mechanical reliability. Conventional epoxy resins for the bonding still require curing at high temperatures. Even after the curing procedure, the bonding joint loses flexibility and exhibits poor fatigue durability. To solve this problems, low-temperature and adhesive-free bonding are required. In this work, we develop a room temperature bonding process for polymer substrates using carbon nanotube heated by microwave irradiations. After depositing multiple-wall carbon nanotubes (MWNTs) on PET polymer substrates, they are heated locally with by microwave while the entire bonding specimen maintains room temperature and the heating induces mechanical entanglement of CNT-PET. The room temperature bonding was conducted for a PET/CNT/PET specimen at 600 watt of microwave power for 10 seconds. Thickness of the CNT bonding joint was very thin that it obtains flexibility as well. In order to evaluate the mechanical reliability of the joint specimen, we performed lap shear test, three-point bending test, and dynamic bending test, and confirmed excellent joint strength, flexibility, and bending durability from each test.
polymer substrate, microwave, carbon nanotube, room temperature bonding, mechanical reliability
Dept. of Welding & Joining Science Engineering, Chosun University, 309 Pilmoon-daero, Dong-gu, Gwangju 61452, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 95-103.
대표적인 저온솔더인 Sn-58Bi에 Ru nanoparticles을 첨가하여 Sn-58Bi-xRu 복합솔더를 제작하고 Cu/OSP 및 ENIG 표면처리된 PCB 기판과 반응시켜 계면반응 및 솔더조인트 신뢰성을 분석하였다. Cu/OSP와의 반응에서 형성된 Cu6Sn5 IMC는 Ru 함량에 따른 두께 변화가 거의 없고 100hr aging 후에도 큰 변화없이 고속 전단시험시 솔더 내부로 연 성파괴가 발생하였다. ENIG 와의 반응시에는 Ru 함량이 증가함에 따라서 Ni3Sn4 IMC 두께가 감소하는 경향을 보였으 며 일부 시편에서 ENIG 특유의 취성파괴 현상이 발견되었다. Ru 원소는 계면 부근에서 발견되지 않아서 계면반응에 크 게 관여하지 않는 것으로 판단되며 주로 Bi phase와 함께 존재하는 것으로 분석되고 있는데 어떠한 형태로 두 원소가 공 존하고 있는지에 대해서는 추가적인 연구가 필요하다.
Sn-58Bi-xRu composite solders were prepared by adding Ru nanoparticles to Sn-58Bi, a typical lowtemperature solder, and the interfacial reaction and solder joint reliability were analyzed by reacting with Cu/OSP and ENIG surface treated PCB boards. The Cu6Sn5 IMC formed by the reaction with Cu/OSP had little change in thickness depending on the Ru content, and ductile fracture occurred inside the solder during the high-speed shear test without any significant change even after 100 hr aging. In reaction with ENIG, the Ni3Sn4 IMC thickness tended to decrease as the Ru content increased, and ENIG-specific brittle fracture was found in some specimens. Since Ru element is not found near the interface, it is judged not to be significantly involved in the interfacial reaction, and it is analyzed that it mainly exists together with the Bi phase.
Sn-58Bi, Ru nanoparticle, composite solder, OSP, ENIG
ICT · device packaging Research Center, Korea Electronics Technology Institute (KETI), Bundang-gu, Seongnam-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 1-7.
본 논문에서는 Bare-die Chip 형태의 Drive amplifier를 Ajinomoto Build-up Film (ABF)와 FR-4로 구성된 PCB 에 내장함으로써 28 GHz 대역 모듈에서 적용될 수 있는 내장형 능동소자 모듈을 구현하였다. 내장형 모듈에 사용된 유 전체 ABF는 유전율 3.2, 유전손실 0.016의 특성을 가지고 있으며, Cavity가 형성되어 Drive amplifier가 내장되는 FR4는 유전율 3.5, 유전손실 0.02의 특성을 가진다. 제안된 내장형 Drive amplifier는 총 2가지 구조로 공정하였으며 측정을 통 해 각각의 S-Parameter특성을 확인하였다. 공정을 진행한 2가지 구조는 Bare-die Chip의 패드가 위를 향하는 Face-up 내 장 구조와 Bare-die Chip의 패드가 아래를 향하는 Face-down내장 구조이다. 구현한 내장형 모듈은 Taconic 사의 TLY-5A (유전율 2.17, 유전손실 0.0002)를 이용한 테스트 보드에 실장 하여 측정을 진행하였다. Face-down 구조로 내장한 모듈은 Face-up 구조에 비해 Bare-die chip의 RF signal패드에서부터 형성된 패턴까지의 배선 길이가 짧아 이득 성능이 좋을 것 이라 예상하였지만, Bare-die chip에 위치한 Ground가 Through via를 통해 접지되는 만큼 Drive amplifier에 Ground가 확 보되지 않아 발진이 발생한다는 것을 확인하였다. 반면 Bare-die chip의 G round가 부착되는 PCB의 패턴에 직접적으로 접지되는 Face-up 구조는 25 GHz에서부터 30 GHz까지 약 10 dB 이상의 안정적인 이득 특성을 냈으며 목표주파수 대역 인 28 GHz에서의 이득은 12.32 dB이다. Face-up 구조로 내장한 모듈의 출력 특성은 신호 발생기와 신호분석기를 사용하 여 측정하였다. 신호 발생기의 입력전력(Pin)을 -10 dBm에서 20 dBm까지 인가하여 측정하였을 때, 구현한 내장형 모듈 의 이득압축점(P1dB)는 20.38 dB으로 특성을 확인할 수 있었다. 측정을 통해 본 논문에서 사용한 Drive amplifier와 같은 Bare-die chip을 PCB에 내장할 때 Ground 접지 방식에 따라 발진이 개선된다는 것을 검증하였으며, 이를 통해 Chip Faceup 구조로 Drive amplifier를 내장한 모듈은 밀리미터파 대역의 통신 모듈에 충분히 적용될 수 있을 것이라고 판단된다.
In this paper, by embedding a bare-die chip-type drive amplifier into the PCB composed of ABF and FR- 4, it implements an embedded active device that can be applied in 28 GHz band modules. The ABF has a dielectric constant of 3.2 and a dielectric loss of 0.016. The FR-4 where the drive amplifier is embedded has a dielectric constant of 3.5 and a dielectric loss of 0.02. The proposed embedded module is processed into two structures, and S-parameter properties are confirmed with measurements. The two process structures are an embedding structure of face-up and an embedding structure of face-down. The fabricated module is measured on a designed test board using Taconic’s TLY- 5A(dielectric constant : 2.17, dielectric loss : 0.0002). The PCB which embedded into the face-down expected better gain performance due to shorter interconnection-line from the RF pad of the Bear-die chip to the pattern of formed layer. But it is verified that the ground at the bottom of the bear-die chip is grounded Through via, resulting in an oscillation. On the other hand, the face-up structure has a stable gain characteristic of more than 10 dB from 25 GHz to 30 GHz, with a gain of 12.32 dB at the center frequency of 28 GHz. The output characteristics of module embedded into the face-up structure are measured using signal generator and spectrum analyzer. When the input power (Pin) of the signal generator was applied from -10 dBm to 20 dBm, the gain compression point (P1dB) of the embedded module was 20.38 dB. Ultimately, the bare-die chip used in this paper was verified through measurement that the oscillation is improved according to the grounding methods when embedding in a PCB. Thus, the module embedded into the face-up structure will be able to be properly used for communication modules in millimeter wave bands.
Embedding, Face-up, Face-down, Active device, 28 GHz
1Department of Manufacturing System and Design Engineering, Seoul National University of Science and Technology, Seoul 01811 Korea 2Department of Nano-IT Convergence Engineering, Seoul National University of Science and Technology, Seoul 01811 Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 9-15.
최근 반도체 소자의 소형화는 물리적 한계에 봉착했으며, 이를 극복하기 위한 방법 중 하나로 반도체 소자를 수직으로 쌓는 3D 패키징이 활발하게 개발되었다. 3D 패키징은 TSV, 웨이퍼 연삭, 본딩의 단위공정이 필요하며, 성능향 상과 미세피치를 위해서 구리 본딩이 매우 중요하게 대두되고 있다. 본 연구에서는 대기중에서의 구리 표면의 산화방지 와 저온 구리 본딩에 티타늄 나노 박막이 미치는 영향을 조사하였다. 상온과 200oC 사이의 낮은 온도 범위에서 티타늄이 구리로 확산되는 속도가 구리가 티타늄으로 확산되는 속도보다 빠르게 나타났고, 이는 티타늄 나노 박막이 저온 구리 본 딩에 효과적임을 보여준다. 12 nm 티타늄 박막은 구리 표면 위에 균일하게 증착되었고, 표면거칠기(Rq)를 4.1 nm에서 3.2 nm로 낮추었다. 티타늄 나노 박막을 이용한 구리 본딩은 200oC에서 1 시간 동안 진행하였고, 이후 동일한 온도와 시 간 동안 열처리를 하였다. 본딩 이후 측정된 평균 전단강도는 13.2 MPa이었다.
Miniaturization of semiconductor devices has recently faced a physical limitation. To overcome this, 3D packaging in which semiconductor devices are vertically stacked has been actively developed. 3D packaging requires three unit processes of TSV, wafer grinding, and bonding, and among these, copper bonding is becoming very important for high performance and fine-pitch in 3D packaging. In this study, the effects of Ti nanolayer on the antioxidation of copper surface and low-temperature Cu bonding was investigated. The diffusion rate of Ti into Cu is faster than Cu into Ti in the temperature ranging from room temperature to 200oC, which shows that the titanium nanolayer can be effective for low-temperature copper bonding. The 12nm-thick titanium layer was uniformly deposited on the copper surface, and the surface roughness (Rq) was lowered from 4.1 nm to 3.2 nm. Cu bonding using Ti nanolayer was carried out at 200oC for 1 hour, and then annealing at the same temperature and time. The average shear strength measured after bonding was 13.2 MPa.
Ti passivation, Cu bonding, 3D packaging, Solid state diffusion, Chip bonding
1Department of Materials Science and Engineering, Chungnam National University, 99 Daehak-ro, Yuseong-gu, 34134 Daejeon, Republic of Korea 2Department of Energy Science and Technology, Graduate School of Energy Science and Technology, Chungnam National University, 99 Daehak-ro, Yuseong-gu, 34134 Daejeon, Republic of Korea 3Energy Materials Research Center, Korea Chemical Research Institute 141 Gajeong-ro, Yuseong-gu, 34114 Daejeon, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 17-24.
페로브스카이트 태양전지는 용액공정으로 제작되어 공정 중 전구체 조성제어를 통해 밴드갭을 용이하게 조절 할 수 있다. 탠덤 태양전지의 상부셀로 활용하여 실리콘 태양전지와 접합 시 30% 이상의 효율 달성이 가능하지만, 페로 브스카이트 태양전지의 낮은 안정성이 상용화의 걸림돌로 작용하고 있다. 아이오딘 이온 및 전극 물질 확산이 주된 열화 기구로 알려져 있어 장기 안정성을 확보하기 위해서는 이러한 이온 이동의 방지가 필요하다. 본 연구에서는 층간소재와 페로브스카이트 광활성층 사이의 이온이동에 의한 열화현상을 관찰하고, 이를 억제하기 위해 페로브스카이트 소재와 은 전극 사이에 버퍼층을 도입하여 소자의 안정성을 확보하였다. 85oC에서 300시간 이상 보관 시 버퍼가 없는 소자는 페로 브스카이트 층이 PbI2 및 델타상으로 변화하며 변색되었으며 AgI가 형성되는 것을 확인했다. LiF와 SnO2 버퍼 도입 시 이온이동 억제 효과를 통해 페로브스카이트 태양전지의 열안정성이 향상되었다. LiF버퍼층 적용 및 봉지를 한 소자는 85oC-85%RH damp heat 시험 200시간 후 효율감소가 발생하지 않았으며 추가로 AM 1.5G-1SUN 하에서 최대출력점을 추적하였을 때 200시간 후 초기 효율의 90% 이상 유지하는 것을 확인했다. 이 결과는 버퍼층 형성을 통한 층간 물질이 동 억제가 장기안정성을 확보하기 위한 필요조건임을 보여준다.
Perovskite solar cells (PSCs) can be fabricated through solution process economically with variable bandgap that is controlled by composition of precursor solution. Tandem cells in which PSCs combined with silicon solar cells have potential to reach high power conversion efficiency over 30%, however, lack of long-term stability of PSCs is an obstacle to commercialization. Degradation of PSCs is mainly attributed to the mass transport of halide and metal electrode materials. In order to ensure the long-term stability, the mass transport should be inhibited. In this study, we confirmed degradation behaviors due to the mass transport in PSCs and designed buffer layers with LiF and/or SnO2 to improve the long-term stability by suppressing the mass transport. Under high-temperature storage test at 85oC, PSCs without the buffer layers were degraded by forming PbI2, AgI, and the delta phase of the perovskite material, while PSCs with the buffer layers showed improved stability with keeping the original phase of the perovskite. When the LiF buffer and encapsulation were applied to PSCs, superior long-term stability on 85oC-85% RH dump heat test was achieved; efficiency drop was not observed after 200 h. It was also confirmed that 90.6% of the initial efficiency was maintained after 200 hours of maximum power tracking test under AM 1.5G-1SUN illumination. Here, we have demonstrated that the buffer layer is essential to achieve long-term stability of PSCs.
stability, buffer, degradation, diffusion, perovskite solar cells
ICT · device packaging Research Center, Korea Electronics Technology Institute (KETI), Bundang-gu, Seongnam-si, Gyeonggi-do, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 25-32.
본 논문에서는 X-Band 대역에서 이중 편파 특성을 갖는 Magneto-Electric(ME) dipole 배열안테나를 제안하 고, 이를 Low Temperature Co-fired Ceramic (LTCC) 공정을 이용하여 구현 및 측정하였다. 제안된 배열안테나는 LTCC 로 구성된 1 1 ME dipole 안테나 32 개를 Teflon PCB에 배열하여 8 4 배열 안테나로 구성된다. 1 1 ME dipole 안 테나는 두 쌍의 방사체에서 각각 수직 편파와 수평 편파를 방사하여 이중 편파를 구현하게 된다. 2개의 Port 급전은 LTCC 를 이용한 적층 공정을 통해 구현하였으며, 각 각의 Port는 포트 간 격리도를 확보하기 위해 -shaped feeding strip을 통 해 독립적으로 방사체에 급전된다. 안테나 배열에 사용된 Teflon PCB는 4층 구조로 형성하였으며, 상단 면과 하단 면을 통해 2개의 Port가 급전된다. 그리고 배열되는 안테나와 Teflon PCB의 임피던스 정합을 위해 Teflon PCB의 전송선로에 g/4 변환기를 적용하였으며 시뮬레이션을 통해 최적 파라미터를 얻었다. 구현된 ME dipole 8 4 배열안테나의 크기는 15.5 mm 11 mm 4.2 mm이며, Port 1 급전 시 측정된 방사 최대 이득은 18.2 dBi, cross-pol은 1.0 dBi이고 Port 2 급 전 시 측정된 방사 최대 이득은 18.1 dBi, Cross-pol은 3 .2 dBi로 확인하였다.
In this paper, the Magneto-Electric(ME) dipole array antenna with dual-polarization in the X-Band is proposed and it is implemented and measured. The proposed array antenna is composed of 32 single ME dipole antenna and a Teflon PCB. 1 1 ME dipole antenna is implemented dual-polarization by radiating vertical polarization and horizontal polarization from two pairs of radiators. 2-port feeding structures are realized by lamination process using LTCC. And, each port independently feeds the radiator through a -shaped feeding strip with isolation between ports. The Teflon PCB used in the antenna array has a 4-layer structure, and 2-port is fed through the top and bottom layers. The g/4 transformer is applied to the transmission line of the Teflon PCB for impedance matching of the arrayed antenna and the Teflon PCB, and the optimal parameters are obtained through simulation. The measured maximum antenna gains of port 1 was 18.2 dBi, Cross-pol was 1.0 dBi. And the measured maximum antenna gains of port 1 was 18.1 dBi, Cross-pol was 3.2 dBi.
Dual-polarization, ME-dipole, LTCC, X-Band, Array antenna
Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 33-38.
최근 유연 디스플레이에 관한 대중의 관심이 증대됨에 따라 롤러블(rollable), 폴더블(foldable) 디스플레이와 같은 우수한 폼 팩터(form factor)를 지닌 차세대 유연(flexible) 디스플레이가 주목받고 있다. 유연 디스플레이의 기계적 신뢰성 확보 측면에서, 내부 절연막으로 활용되는 실리콘 질화물(SiNx) 박막은 구동 중 발생하는 응력에 매우 취약하므 로 기계적 물성을 정확히 파악하여 파손을 예측하고 패널의 전기적 단락을 방지하는 것이 중요하다. 본 논문에서는, ~130 nm, ~320 nm 두께의 SiNx 박막 박막 상부에 ~190 nm 두께의 유기 나노 보강층(PMMA, PS, P3HT)을 코팅하여 이중층 구조로 인장함으로써 매우 취성한 SiNx 박막의 탄성 계수와 인장 강도 및 연신율을 측정하는 데 성공하였다. 챔버 압력 및 증착 파워를 조절한 공정 조건(A: 1250 mTorr, 450 W/B: 1000 mTorr, 600 W/C: 750 mTorr, 700 W)을 통해 제작된 ~130 nm SiNx 의 탄성계수는 A: 76.6±3.5, B: 85.8±4.6, C: 117.4±6.5 GPa로, ~320 nm SiNx는 A: 100.1±12.9, B: 117.9±9.7, C: 159.6 GPa로 측정되었다. 결과적으로, 동일 공정 조건 하에서 SiNx 박막의 두께가 증가할수록 탄성 계수가 증가하는 경향을 확인하였으며, 유기 나노 보강층을 활용한 인장 시험법은 파손되기 쉬운 취성 박막의 기계적 물성을 높 은 정밀도로 측정하는 데 효과적이었다. 본 연구에서 개발된 방법은, 취약한 디스플레이용 박막의 정량적인 기계적 물성 파악을 가능케하여 강건한 롤러블, 폴더블 디스플레이의 설계에 이바지할 수 있을 것으로 기대한다.
Recently, rollable and foldable displays are attracting great attention in the flexible display market due to their excellent form factor. To predict and prevent the mechanical failure of the display panels, it is essential to accurately understand the mechanical properties of brittle SiNx thin films, which have been used as an insulating film in flexible displays. In this study, tensile properties of the ~130 nm- and ~320 nm-thick SiNx thin films were successfully measured by coating a ~190 nm-thick organic nano-support-layer (PMMA, PS, P3HT) on the fragile SiNx thin films and stretching the films as a bilayer state. Young’s modulus values of the ~130 nm and ~320 nm SiNx thin films fabricated through the controlled chamber pressure and deposition power (A: 1250 mTorr, 450 W/B: 1000 mTorr, 600 W/C: 750 mTorr, 700 W) were calculated as A: 76.6±3.5, B: 85.8±4.6, C: 117.4±6.5 GPa and A: 100.1±12.9, B: 117.9±9.7, C: 159.6 GPa, respectively. As a result, Young’s modulus of ~320 nm SiNx thin films fabricated through the same deposition condition increased compared to the ~130 nm SiNx thin films. The tensile testing method using the organic nano-support-layer was effective in the precise measurement of the mechanical properties of the brittle thin films. The method developed in this study can contribute to the robust design of the rollable and foldable displays by enabling quantitative measurement of mechanical properties of fragile thin films for flexible displays.
Bilayer, Mechanical Property, Silicon Nitride, Tensile Test, Thin Film
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 39-40.
1Carbon & Light Materials Application R&D Group, Korea Institute of Industrial Technology, 222 Palbok-ro, Deokjin-gu, Jeonju 54853, Korea 2School of Advanced Materials Engineering, Jeonbuk National University,567 Baekje-daero, Deokjin-gu, Jeonju 54896, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 1-10.
최근 전자 부품의 소형화, 고집적화가 진행되고 있으며, 소형화된 전자기기는 작은 면적과 얇은 두께로 전자 파 간섭 및 발열문제를 해결해야 한다. 그래핀(Graphene) 복합재와 그라파이트(Graphite) 복합재는 가벼우면서도 우수한 전기 전도성과 열전도도로 전자파 차폐와 방열 문제를 해결할 수 있는 소재이다. 최근 합성 기술과 복합재 제조기술이 발 전함에 따라 그래핀과 그라파이트 복합재를 다양한 분야에 적용하기 위한 연구들이 진행되고 있으며, 본 연구에서는 그 래핀과 그라파이트를 이용하여 전자파 차폐 및 방열 특성을 동시에 가지는 복합재 필름을 제안한 최근 연구를 알아보고 자 한다.
Recently, electronic components are becoming smaller and highly integrated. As a result, electromagnetic interference (EMI) and heat generation problems must be solved simultaneously with a small area and thickness. Graphene composites and graphite composites are lightweight materials that can simultaneously solve EMI shielding and heat dissipation problems with excellent electrical and thermal conductivity. With the recent development of synthetic technology and composite manufacturing technology, the research to application of their composites is increasing. In this paper, we reviewed the latest researches on composite films of graphene and graphite for EMI shielding and heat dissipation.
EMI shielding, Heat dissipation, Graphene composite film, Graphite composite film
Department of Display and Materials Engineering, Soonchunhyang University, 22 Soonchunhyang-ro, Asan-si, Chungcheongnam-do 31538, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 11-18.
(1-x)BaWO4-xBaV2O6(x=0.54~0.85) 조성의 새로운 초저온 동시 소성 세라믹(ULTCC)용 마이크로파 유전체 복합 재료를 BaWO4와 BaV2O6의 혼합물을 소성하여 제조되었다. 수축 시험은 세라믹 복합재가 BaV2O6의 영향으로 500 oC의 낮은 온도에서 치밀화가 시작되며, 650oC에서 상대밀도 98%로 소결될 수 있음을 보였다. X-선 회절 분석은 복합체 는 BaWO4와 BaV2O6이 공존하고 소결체에서 2차상이 검출되지 않음을 보였다. 이는 두 상이 서로 우수한 화학적 안정 성이 있음을 의미하였다. 거의 0에 가까운 공진 주파수 온도계수(τf)는 복합체에 존재하는 두 상의 τf 값이 각각 양(+) 및 음(-)의 값임에 따라 두 상의 상대적 함량을 조절하여 얻을 수 있었다. BaV2O6의 함량이 x=0.53에서 0.85로 증가함에 따 라 복합 재료의 τf 값은 7.54에서 14.49 ppm/oC로 증가하였고 εr은 10.08에서 11.17로 증가했으며 Qxf값은 47,661에서 37,131 GHz로 감소하였다. 최고의 마이크로파 유전 특성은 BaV2O6의 함량이 x=0.6 일 때, εr=10.4, Q×f=44,090 GHz 및 τf=-2.38 ppm/oC값을 얻을 수 있었다. 화학적 호환성 실험은 개발된 복합 재료가 동시 소성 과정에서 알루미늄 전극과 반 응성이 없음을 보여주었다.
A novel microwave dielectric composite material for ultra-low temperature co-fired ceramics (ULTCC) with (1-x)BaWO4-xBaV2O6 (x=0.54~0.85) composition was prepared by firing a mixture of BaWO4 and BaV2O6. Shrinkage tests showed that the ceramic composite begins to densify at a temperature as low as 550°C and can be sintered at 650 °C with 98% of relative density under the influence of BaV2O6. X-ray diffraction analysis showed that BaWO4 and BaV2O6 coexisted and no secondary phase was detected in the sintered bodies, implying good chemical compatibility between the two phases. Near-zero temperature coefficients of the resonant frequency (τf) could be achieved by controlling the relative content of the two phases, due to their positive and negative τf values, respectively. With increasing BaV2O6 (x from 0.53 to 0.85), the τf value of the composites increased from -7.54 to 14.49 ppm/oC, εr increased from 10.08 to 11.17 and the quality factor (Q×f value) decreased from 47,661 to 37,131 GHz. The best microwave dielectric properties were obtained for x=0.6 samples with εr=10.4, Q×f=44,090 GHz, and τf=-2.38 ppm/oC. Chemical compatibility experiments showed the developed composites are compatible with aluminum electrode during co-firing process.
ULTCC, 5G communications, BaWO4-BaV2O6 composites, Microwave dielectric properties
Department of Display Engineering, Pukyong National University, 45 Yongso-Ro, Busan 48513, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 19-24.
본 논문은 경면반사특성을 갖는 솔더볼의 생산공정 관리와 품질확보를 목적으로 머신비전을 적용한 3차원형 상을 결함검사방법으로서, 60미크론 이내의 마이크로 솔더볼을 대상으로 정밀한 위치제어장치가 필요없이 임의로 위치 한 솔더볼의 반사영상을 취득 후 통계적으로 분석하여 3차원 형상의 결함유무를 검사하는 방법을 제안한다. 이를 위해 복수개의 LED를 링형태로 배열한 광원을 사용하여 트레이에 위치한 많은 수의 마이크로솔더볼을 동시에 촬영한 영상을 취득하고, 영상처리를 통해 반사되는 LED의 상대적 위치를 구한 후, 통계적 분석을 통하여 결함의 유무를 판단하는 방 법을 제안하고 실험을 통해 그 효용성을 보인다.
A statistical approach to inspection of the 3-D shape of micro solder balls is proposed, where an optical method with spatially arranged LED and specular reflection is used. The reflected image captured by a vision system was analyzed to calculate the relative displacements of LED’s in the image. Also, the statistics of displacements for the solder balls contained in a captured image are used to detect existing defects, and the usefulness of the proposed method is shown via experiments.
Micro Solder Ball, 3-D Shape Inspection, Vision
1Department of Chemical Engineering, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea 2Optoelectronics Convergence Research Center, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea 3Energy Convergence Core-Facility, Chonnam National University, 77 Yong-bong-ro, Buk-gu, Gwangju 61186, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 25-29.
연구에서는 HVPE 방법을 사용하여 Ni-Pd and Carbon-Nanotube nanoalloys (Ni-Pd-CNT) 위에 α-Ga2O3 을 성장시켜 Ni-Pd-CNT에 따른 효과를 확인하였다. 그 결과, 무전해 Ni 도금 시간 40초에서 성장한 α-Ga2O3 에피층의 두께는 11 μm로 확인되었다. 또한, α-Ga2O3 에피층의 표면 형태는 균열 발생 없이 기판에 대한 우수한 접착력을 보여주 었다. 결과적으로, 성장과정에서 발생한 수평 성장에 의해 α-Ga2O3 대의 비대칭면인 (1014) FWMH 값을 크게 감소할 수 있었다.
This paper demonstrates the utility of the Ni-Pd and carbon-nanotube (Ni-Pd-CNT)-based nanoalloy to improve the α-Ga2O3 crystal quality using the halide-vapor-phase epitaxy (HVPE) method. As result, the overall thickness of the α-Ga2O3 epitaxial layer increased from a Ni electroless plating time of 40 s to 11 μm after growth. In addition, the surface morphologies of the α-Ga2O3 epilayers remained flat and crack-free. The full-width half-maximum results of the X-ray diffraction analysis revealed that the (1014) diffraction patterns decreased with increasing nominal thickness.
α-Ga2O3, HVPE, ELOG, Ni-Pd nanoalloys
1Department of Mechanical Engineering, Dongyang Mirae University, 445, Gyeongin-ro, Guro-gu, Seoul, Republic of Korea 2Sustainable Technology and Wellness R&D Group, KITECH, 156, Gaetbeol-ro, Yeonsu-gu, Incheon, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 31-39.
본 논문에서는 FEM(유한요소법)을 사용하여 PoP (Package on Package)용 PCB를 unit(유닛)과 substrate(서브 스트레이트)로 분리한 warpage 해석과 warpage에 미치는 층별 두께의 영향도 분석과 층별 두께 조건을 다구찌법에 의한 SN비(Signal-to-Noise ratio)로 분석하였다. 해석 결과에 의하면 유닛 PCB는 회로층의 영향이 대단히 높았는데 특히 외층 의 영향도가 높았다. 반면에 서브스트레이트 PCB는 회로층의 영향도가 높았으나 유닛 PCB에 비해 상대적으로 낮았으 며 오히려 솔더 레지스트의 영향도가 증가하였다. 따라서 유닛 PCB와 서브스트레이트 PCB를 동시에 고려하여 PoP PCB 의 층별 구조는 외부와 내부 회로층은 두껍게, 윗면 솔더 레지스트는 얇게 설계하고 바닥면 솔더 레지스트의 두께를 5μm 와 25μm 사이의 두께를 선정하는 바람직하다.
In this paper, warpage analysis that separates PCB for PoP (Package on Package) into unit and substrate using FEM (Finite Element Method), analysis of the effect of layer thickness on warpage, and SN (Signal-to-Noise) ratio by Taguchi method was carried. According to the analysis result, the contribution of the circuit layer on warpage was very high in the unit PCB, and the contribution of the outer layer was particularly high. On the other hand, the substrate PCB had a high influence of the circuit layer on warpage, but it was relatively low compared to the unit PCB, and the influence of the solder resist was rather increased. Therefore, considering the unit PCB and the substrate PCB at the same time, it is desirable to design the PCB for PoP layer-by-layer structure so that the outer and inner circuit layers are thick, the top solder resist is thin, and the thickness of the bottom solder resist is between 5 μm and 25 μm.
PoP, PCB, Unit, Substrate, FEM, Warpage, Taguchi method
Department of Materials Science & Engineering, Kangwon National University, 1 Kangwondaehak-gil, Chuncheon, Gangwon, 24341, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 41-45.
본 연구에서는 멤리스터 소자의 높은 신뢰성을 확보하기 위해 소자 제작 단계에서 30 nm 두께의 ZrO2 금속 산화물 박막 위 국부영역에 리튬 filament seed 층을 패턴하여 작은 이온반경의 리튬이온을 저항변화 주체로 활용하는 멤 리스터 소자를 구현하였다. 패턴 된 리튬 filament seed 대비 다양한 상부전극의 면적을 적용하여 멤리스터-커패시턴스 병렬 구조의 이온형 저항변화 소자에서 커패시턴스가 filament type 저항변화 특성에 미치는 영향을 조사하고자 하였다. 이를 위해 ZrO2 박막 위에 5 nm 두께, 5 μm 5 μm 면적의 리튬 filament seed 증착 후 50 μm, 100 μm 직경의 상부전 극을 증착, 리튬 메탈의 확산을 위한 250oC 열처리 전 후 샘플에서 저항변화 특성을 확인하였다. 열확산에 의해 형성된 전도성 filament의 경우 전압에 의한 제어가 불가함을 확인하였으며, 전압에 의해 형성된 filament만이 electrochemical migration에 의한 가역적 저항변화 특성 구현이 가능한 것을 확인하였다. 전압에 의한 filament 형성 시 병렬로 존재하는 커패시턴스의 크기가 filament의 형성 및 소실에 중요한 인자임을 확인하였다.
In this study, in order to secure the high reliability of the memristor, we adopted a patterned lithium filament seed layer as the main agent for resistive switching (RS) characteristic on the 30 nm thick ZrO2 thin film at the device manufacturing stage. Lithium filament seed layer with a thickness of 5 nm and an area of 5 μm 5 μm were formed on the ZrO2 thin film, and various electrode areas were applied to investigate the effect of capacitance on filament type memristive behavior in the parallel memristive circuit of memristor and capacitor. The RS characteristics were measured in the samples before and after 250°C post-annealing for lithium metal diffusion. In the case of conductive filaments formed by thermal diffusion (post-annealed sample), it was not available to control the filament by applying voltage, and the other hand, the as-deposited sample showed the reversible RS characteristics by the formation and rupture of filaments. Finally, via the comparison of the RS characteristics according to the electrode area, it was confirmed that capacitance is an important factor for the formation and rupture of filaments.
Li filament seed, memristor, capacitor, capacitance effect, filament type
Department of Cogno-Mechatronics Engineering, Pusan National University, Busan 46241, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 47-50.
Nanoimprint lithography (NIL) has revolutionized the fabrications of electronics, photonics, optical and biological devices. Among all the NIL processes, roll-to-roll nanoimprinting is regarded best for having the attributes of low cost, continuous, simple, and energy-efficient process for nanoscale device fabrication. However, large-area printing is limited by the master mold deformation. In this study, a finite element model (FEM) has been constructed to assess the deformation of the roll mold adhesively wrapped on the carbon fiber reinforced material (CFRP) base roll. This study also optimizes the deformations in the metallic roll mold with respect to nip-forces applied in the printing process of nano-fabrication on large scale. The numerical simulations were also conducted to evaluate the deflection in roll mold assembly due to gravity. The results have shown decreasing trend of the deformation with decreasing nip-force. Also, pressure uniformity of about 40% has been optimized by using the current numerical model along with an acceptable deflection value in the vertical axis due to gravity.
Nanoimprint lithography (NIL), Roll-to-roll process, Carbon fiber reinforced polymer (CFRP), Simulation
1Department of Cogno-Mechatronics Engineering, Pusan National University, 2, Busandaehak-ro 63beon-gil, Geumjeong-gu, Busan 46241, Korea 2Department of Optics and Mechatronics Engineering, Pusan National University, 2, Busandaehak-ro 63beon-gil, Geumjeong-gu, Busan 46241, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 51-55.
본 논문은 보통 병원에서 간호사가 수작업으로 진행하는 약물주입 과정을 대신할 수 있는 의료용 미세 유량 제어 장치를 소개한다. 이는 아두이노로 구현되었으며 환자의 지속적인 관리에 도움이 되고자 한다. 기본적으로 연동펌 프를 통해 약물이 주입되며 RGB color sensor를 통해 배출액의 색상을 값으로 받아들이고 이 값을 바탕으로 수액백에 달 린 연동펌프의 모터 속도를 조절하는 알고리즘을 아두이노 코딩을 통해 구현한다. 전체적인 시스템은 배터리를 통해 작 동되며 연구실에서 355nm UV pulsed laser를 통해 제작한 LIG strain sensor의 추가를 통해 수액백으로부터 주입되는 약 물의 양을 측정한다. 이렇게 제작된 미세 유량 제어 장치는 모든 과정을 수작업으로 진행해오던 병원에 곧장 사용 가능 하며 간호사의 편의를 제공하고자 한다. 이 장치를 통해 한층 향상된 의료서비스를 제공할 수 있다.
The nurses manually carry out the intravenous therapy for the patients. Using an Arduino, the fine flow controlling device was invented to provide an ongoing patient care. The medication is injected through a peristaltic pump, and the amount of the solution is controlled with a RGB color sensor. The power of the device is supplied through the batteries. An amount of the injection is measured with LIG strain sensor fabricated by 355nm UV pulsed laser. This system will provide a better medical service.
355nm UV pulsed laser, Arduino, LIG, strain sensor
Department of Electronics Engineering, Dong-A University, 37, Nakdong-Daero 550-gil, Busan 49315, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 57-61.
마이크로 기둥 구조물 위에 인듐 범프 배열을 형성하는 공정을 제안한다. Benzocyclobutene (BCB) 평탄화와 etch-back 공정을 통하여 매우 협소한 마이크로 기둥 위에 인듐 범프를 형성할 수 있는 공간을 확보할 수 있다. 본 연구 에서는 단파장 적외선을 감지용 320×256 포맷의 하이브리드 카메라 센서 제조에 대한 자세한 공정 과정을 소개한다. 다 양한 공정을 거친 BCB 필름의 shear strength는 quartz crystal microbalance 방법으로 측정하여 추출하였다. BCB 필름 의 shear strength는 인듐 범프보다 103배 더 높은 것으로 확인하였다. 제작된 SWIR 카메라 센서로부터 측정된 암전류의 분포는 제안한 인듐 범프 형성 공정이 매우 민감한 적외선 카메라 센서를 구현하는 데 유용할 수 있음을 제시한다.
A formation process of indium bump arrays on micro-pillar structures is proposed. The space to form indium bump on the narrow structures can be secured applying the benzocyclobutene (BCB) planarization and its etch-back process. We exhibit a detailed overview of the process steps involved in the fabrication of 320×256 hybrid camera sensor for short-wavelength infrared (SWIR) detection. The shear strength of the BCB, which has undergone the different processes, is extracted by quartz crystal microbalance measurement. The shear strength of the BCB is three orders of magnitude higher than that of the indium bump itself. The measured dark current distribution of the fabricated SWIR camera sensor indicates the suggested process of indium bumps can be useful for embodying highly sensitive infared camera sensors.
Indium bump, Micro-pillar, BCB planarization, Electroplating, SWIR camera sensor
Electronic Packaging Research Center, Kangnam University, 20, Gangnamseo-ro, Giheung-gu, Yongin-si, Gyeonggi-do 16977, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 63-67.
이번 논문에선 육안으로 확인하기 어려운 곳에 남아있는 불씨들을 효율적으로 감지하기 위해 CO2와 온도 변 화를 감지하는 기능을 탑재한 잔불 감지용 IoT 모듈을 개발하여 이를 보호하는 패키지를 유한요소해석을 사용하여 최적 화하였다. 개발된 모듈은 불씨의 특성을 고려하여 저전력 원거리 통신이 가능한 LoRa 기술을 적용하여 제작하였다. 제 작된 모듈을 보호하기 위한 패키지 디자인을 고안하여 낙하 시 발생하는 응력에 대해 비교 분석하였다. 그 결과, Model C에서 가장 작은 응력이 발생하였다. 또한 패키지의 모듈 장착부분에 응력 집중이 예측된 타 모델들과 달리 날개 부분에 서 응력이 집중 현상이 예측되어 내부 모듈을 보호하기에 적합하다 판단해 이를 적용한 패키지를 제작하였다.
In order to detect fires that may not be visible to the naked eye, an IoT module that uses changes in Carbon dioxide (CO2) levels and temperature to effectively identify ambers (dying flames) was developed. Finite element analysis was then used to optimize the packaging for this module. Given the nature of ambers, the low power long range LoRa (Long Range) technology was used in the development of this module. To protect the module, a number of packages were designed, and comparative analysis performed on the stress generated when they fall. The results of which show that Model C showed the lowest stress. In addition, unlike other models in which stress concentration was predicted in the module mounting part of the package, in this model the stress concentration phenomenon was predicted in the wing part. It was therefore determined that this approach is ideal for protecting the internal module, and a package to which this was applied was manufactured.
IoT, 잔불감지, FEM, Drop Test, Stress
Department of Advanced Materials Engineering, Kyonggi University, 154-42, Gwanggyosan-ro, Yeongtong-gu, Suwon 16227, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 69-72.
Quantum Dot Light-Emitting Diodes (QLEDs)는 제조 공정이 용액 공정을 기반으로 하기 때문에 잉크젯 공정 에 쉽게 적용할 수 있다. 하지만 QLED의 적층은 서로 다른 용매를 사용하는 직교 공정이 필요하기 때문에 잉크젯 인 쇄 공정이 더 복잡하며 비용이 상승한다. 따라서 한 번의 공정으로 두 개의 층을 증착하면 제조 단계를 줄일 수 있어 공 정 시간이 절감된다. 이 연구에서 우리는 QD와 정공 수송 재료의 혼합물을 사용하여 standard 구조의 QLED를 제작하 였다. TFB와 QD를 클로로벤젠에 분산시켜 혼합층에 사용하였고, 소자는 45,850 cd/m2의 최고 휘도를 나타내었다. 이 연 구는 잉크젯 프린팅 공정을 적용하여 전계발광 장치를 제작할 수 있는 가능성을 확인하였다.
Various studies for QLEDs using inkjet printing has been actively conducted. Multilayers in QLEDs need an orthogonal process inevitably using different solvents and it makes the inkjet printing process more difficult and expensive. Therefore, coating two layers in a single process can reduce the fabrication step, resulting in the process time. In this study, we fabricated QLEDs of standard structure using a mixture of emission layer and hole transport layer. The mixed layer was fabricated by dissolving TFB and QDs in chlorobenzene, and the maximum luminance of the device was 45,850 cd/m2. It shows the bright future of the electroluminescence devices applied with inkjet printing process.
Quantum dots, Hole transport materials, Mixed layer
1Department of Advanced Materials Engineering, Kyonggi University, Suwon 16227, Republic of Korea 2Green Materials & Process R&D Group, Korea Institute of Industrial Technology, 55 Jongga-ro, Jung-gu, Ulsan 44413, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 73-77.
신체 착용 및 부착이 가능한 웨어러블 기기용 유연 전극은 외력에 대한 기계적/전기적 내구성을 확보하고 동 시에, 다양한 기능성을 부여하는 방향으로 연구가 활발히 진행되고 있다. 본 연구는 Carbon black를 전도성 필러로 적용 하여 Carbon/PDMS 기반 유연 복합체를 제조하고 carbon black의 함량에 따른 복합체의 유연전극, 온도 센서 및 히터용 소재로서의 적용 가능성에 대해 고찰해 보았다. Carbon black의 함량 증가에 따른 비저항 감소를 관찰하였고, 반복인장 에 따른 전기저항 변화율 실험을 통해 유연전극으로서의 적용 가능성을 확인하였다. 온도 변화에 따른 carbon/PDMS 복 합체의 전기적 특성 평가를 통해 온도센서로서 적용이 가능한 정온도계수 특성을 관찰하였고, carbon black 함량에 따라 정온도계수 특성 조절이 가능함을 확인할 수 있었다. 전압 인가에 따른 Carbon/PDMS 복합체의 발열 특성 관찰을 통해 히터용 소재로서의 적용가능성 역시 확인할 수 있었다.
Flexible electrodes for wearable devices have been actively studied in not only achieving mechanical/electrical stability, but also providing various functionalities for extending its industrial application. In this study, a flexible carbon/ PDMS composite is prepared by addition of carbon black (CB) as a conductive filler, and effect of CB with different contents on electrical properties of the composite was investigated for the application of flexible electrodes, temperature sensor and heater. With increase of CB contents, resistivity of the carbon/PDMS was increased, and excellent durability was observed, confirmed by repetitive stretching deformation test. Resistance increase of the carbon/PDMS with temperature reveals the property of positive temperature coefficient, which can be applied for temperature sensor. Also, joule heating on the carbon/PDMS was observed when electrical potential was applied, indicating the applicability of the carbon/PDMS for heater.
flexible substrate, temperature sensor, heater, thermistor, Carbon/PDMS
Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seodaemun-gu, Seoul 03722, South Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 79-83.
본 연구에서는 기존의 silicon alkoxide(tetraethyl orthosilicate, TEOS)에 비해 단가가 저렴하여 상업화에 유리 한 물유리를 전구체로 사용하여 계면활성제의 농도에 따라 형성되는 다양한 크기의 실리카 중공 미세구(hollow silica microsphere, HSM)를 합성하였다. 계면활성제의 농도에 따른 실리카 중공 미세구의 형성에 대한 물성을 퓨리에 분광기 (Fourier transform infrared spectrometer), 접촉각 측정기(contact angle measurement), Brunauer-Emmett-Teller 및 Barrett- Joyner-Halenda 분석기와 전계방사형 주사전자현미경(field emission scanning electron microscopy)를 이용하여 분석하였 다. 계면활성제를 적정량의 농도로 투입하여 porou s한 물유리 기반 실리카 중공 미세구를 제조할 경우 비표면적은 169 m2/g, 평균 입자 크기 25.3 μm 및 표준편차는 6.25로 우수한 실리카 중공 미세구가 형성됨을 확인하였다.
In this study, hollow silica microspheres (HSM) of various sizes formed according to the concentration of surfactants using water glass as a precursor, which is advantageous for commercialization due to its lower unit cost compared to conventional silicon alkoxide (tetraethyl orthosilicate, TEOS) was synthesized. The physical properties of the silica hollow microspheres according to the concentration of surfactant were analyzed using Fourier transform infrared, contact angle measurement, Brunauer-Emmett-Teller and Barrett-Joyner-Halenda analyzers and field emission scanning electron microscopy. When porous water glass-based hollow silica spheres were prepared by adding a surfactant at an appropriate concentration, it was confirmed that excellent hollow silica spheres were formed with a specific surface area of 169 m2/g, an average particle size of 25.3 μm, and a standard deviation of 6.25.
surfactant; hollow microsphere; silica sphere; water glass; emulsion
1LG Innotek Co. Ltd., Seoul 07796, Republic of Korea 2Department of Materials Science & Engineering, Chonnam National University, Gwangju 61186, Gwangju 61186, Republic of Korea 3School of Semiconductor and Chemical Engineering, Jeonbuk National University, Jeonju 54896, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 85-89.
AlGaN 기반 UV-C 발광다이오드(LEDs)에 전기화학적 전위차 활성화(EPA)에 의한 p-형 활성화를 진행하였다. 높은 저항과 낮은 전도도를 유발하는 중성 Mg-H의 복합체의 수소원자를 EPA를 이용하여 제거하여 p-형 활성화 효율을 높였다. 중성 Mg-H 복합체는 주요 매개 변수인 용액, 전압, 시간에 의해 Mg과 H+로 분해되며, 2차 이온질량 분광법 (SIMS) 분석을 통하여 개선된 정공 캐리어의 농도를 확인할 수 있었다. 이 메커니즘은 결국 내부 양자효율(IQE)의 증가, 광 추출 효율 향상, 역 전류 영역의 누설전류 값 개선, 접합 온도 개선 등을 이루어 결과적으로 UV-C LED의 수명을 향 상시켰다. 체계적인 분석을 위해 SIMS, Etamax IQE 시스템, 적분구, 전류-전압(I-V) 측정 등을 사용하였으며, 그 결과를 기존의 N2-열 처리 방법과 비교 평가하였다.
AlGaN-based UV-C light-emitting diodes (LEDs) were applied for p-type activation by electrochemical potentiostatic activation (EPA). The p-type activation efficiency was increased by removing hydrogen atoms through EPA treatment using a neutral Mg-H complex that causes high resistance and low conductivity. A neutral Mg-H complex is decomposed into Mg and H+ depending on the key parameters of solution, voltage, and time. The improved hole carrier concentration was confirmed by secondary ion mass spectroscopy (SIMS) analysis. This mechanism eventually improved the internal quantum efficiency (IQE), the light extraction efficiency, the leakage current value in the reverse current region, and junction temperature, resulting in better UV-C LED lifetime. For systematic analysis, SIMS, Etamax IQE system, integrating sphere, and current-voltage measurement system were used, and the results were compared with the existing N2-annealing method.
Electrochemical potentiostatic activation, Light emitting diode, p-AlGaN, Hole concentration, Internal quantum efficiency
1Department of Advanced Science and Technology Convergence, Kyungpook National University, 37224, Republic of Korea 2School of Nano & Materials Science and Engineering, Kyungpook National University, 37224, Republic of Korea 3Energy and Environmental Division, Korea Institute of Ceramic Engineering and Technology, 52851, Republic of Korea 4Department of Materials Science & Engineering, Yonsei University, 03722, Republic of Korea 5Electronic Materials Engineering, Kwangwoon University, 01897, Republic of Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 91-96.
본 연구에서는 체가름과 고에너지 볼 밀링 공정이 n-type Bi2Te3 열전 재료의 전기적 및 열적 수송 특성에 미 치는 영향을 검토하였다. 입자 크기가 감소한 분말의 특성을 유지하기 위하여 짧은 시간 안에 소결이 가능한 방전 플라 즈마 소결 공정 (spark plasma sintering, SPS)을 진행하였다. 그 결과, 밀링 처리를 진행한 소결체의 열전 성능지수가 향 상되었으며, 30분동안 고에너지 볼 밀링 공정을 거친 샘플이 425 K에서 0.78의 최대 열전 성능지수를 가지는 것을 확인 하였다. 이는 손쉬운 공정을 이용하여 결정립 크기 감소를 통한 phonon의 격자 산란을 효과적으로 유도한 결과이다. 동 시에 n-type Bi2Te3에서 anti-site defect와 같은 결함을 제어함으로써 캐리어 농도를 증가시킬 수 있음을 본 연구를 통하 여 확인하였다.
The enhancement of thermoelectric figure of merit was achieved by the simple processes of sieving and high energy ball milling, respectively, which are enable to reduce the grain size of n-type Bi2Te3 thermoelectric materials. By optimizing the grain size, the electrical conductivities and thermal conductivities were controlled. In this study, spark plasma sintering was employed for hindering the grain growth during the sintering process. The thermoelectric figure of merit was measured to be 0.78 in the samples with 30 min high energy ball milling process. Notably, this value was 40 % higher than that of pristine Bi2Te3 sample. This result shows the properties of thermoelectric materials can be readily controlled by optimization of grain size via simple ball milling process.
Thermoelectrics, Seebeck effect, Milling, Bi2Te3, Grain size
Electronic Packaging Research Center, Kangnam University, 20, Gangnamseo-ro, Giheung-gu, Yongin-si, Gyeonggi-do 16977, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 97-101.
본 연구에서는 실험 설계법을 통해 인터포저에서 Through Silicon Via (TSV) 및 Redistributed Layer (RDL) 의 구조적 변형에 따른 삽입 손실 특성 변화를 확인하였다. 이때 3-요인으로 TSV depth, TSV diameter, RDL width를 선 정하여, 구조적 변형을 일으켰을 때 400 MHz~20 GHz에서의 삽입 손실을 EM (Electromagnetic) tool Ansys HFSS(High Frequency Simulation Software)를 통해 확인하였다. 반응 표면법을 고려하였다. 그 결과 주파수가 높아질수록 RDL width 의 영향이 감소하고 TSV depth와 TSV diameter의 영향이 증가하는 것을 확인했다. 또한 분석 범위 내에서 RDL width 를 증가시키면서 TSV depth를 감소시키고 TSV diameter를 약 10.7 μm 고정하는 것이 삽입 손실을 가장 최적화 시키는 결과가 관찰되었다.
In this study, Insertion loss according to the structural variant of interposer to Through Silicon Via (TSV) and Redistributed Layer (RDL) was studied through design of experiment. 3-Factors was considered as a variant, TSV depth, TSV diameter, RDL width with factor arrangement method and the response surface method from 400 MHz to 20 GHz. As a result, it was confirmed that as the frequency increased, the effect of RDL width was decreased and the effect of TSV depth and TSV diameter was increased. Also within the analysis range, to increasing RDL width, decreasing TSV depth, and fixing TSV diameter about 10.7 μm was observed optimal result of Insertion loss.
TSV, Interposer, HBM, RDL, FEA
1Department of Materials Science and Engineering, Yonsei University, 50 Yonsei-ro, Seoul 03722, Korea 2Department of Materials Science and Engineering, Hongik University, 94 Wausan-ro, Seoul 04066, Korea
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 103-107.
좁은 밴드갭 반도체 특성을 나타내는 열전소재의 온도에 따른 전자전도 및 열전도 특성은 다수 캐리어 뿐 아 니라 소수 캐리어의 전도 거동에 의해 결정된다. 따라서 소수 캐리어의 weighted mobility에 대한 다수 캐리어의 weighted mobility의 비율로 정의되는 weighted mobility ratio는 열전소재의 성능 증대에 매우 중요한 인자이다. 본 논문에서는 열 전소재의 전자전도 현상에 대한 이론적인 고찰을 바탕으로 weighted mobility ratio 제어가 열전소재의 성능에 미치는 영 향을 규명하여 고성능 Bi-Te계 열전소재 개발에 효과적으로 활용할 수 있는 소재 설계 지침을 제공하고자 한다.
Temperature dependences of electronic and thermal transport properties of narrow band gap thermoelectric materials are dependent on the transport behavior of minority carriers as well as majority carriers. Thus, weighted mobility ratio, which is defined the ratio of weighted mobility for majority carriers to that for minority carriers, must be one of the important parameters to enhance the performance of thermoelectric materials. Herein, we provided a practical guide for the development of high-performance Bi-Te-based thermoelectric materials based on the weighted mobility ratio control by considering theoretical backgrounds related to the electronic transport phenomena in semiconductors.
Thermoelectric, Bi-Te, Weighted mobility ratio, bipolar
Dept. of Mechanical System Design Engineering, Seoul Nat’l Univ. of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 109-114.
상압 수소 플라즈마 전처리가 구리-구리 직접 본딩에 미치는 영향에 대해서 조사하였다. 상압 수소 플라즈마 처리를 통해 구리 박막의 표면 산화층을 환원시킬 수 있었음을 GIXRD 분석을 통해 확인하였다. 플라즈마 파워가 크고 플라즈마 처리 시간이 길수록 환원력 및 표면 거칠기 관점에서 효과적이었다. DCB를 이용한 계면 결합 에너지 측정에서 상압 수소 플라즈마 전처리 후 300oC에서 본딩한 경우 양호한 계면 결합 에너지를 나타내었으나, 본딩 온도가 낮아질수 록 계면 결합 에너지가 낮아져 200oC에서는 본딩이 이루어지지 않았다. 습식 전처리의 경우 250oC 이상에서 본딩한 경 우 강한 결합력을 보였으며, 200oC에서는 낮은 계면 결합 에너지를 나타내었다.
We investigated the effects of atmospheric hydrogen plasma treatment on Cu-Cu direct bonding. Hydrogen plasma was effective in reducing the surface oxide layer of Cu thin film, which was confirmed by GIXRD analysis. It was observed that larger plasma input power and longer treatment time were effective in terms of reduction and surface roughness. The interfacial adhesion energy was measured by DCB test and it was observed to decrease as the bonding temperature decreased, resulting in bonding failure at bonding temperature of 200oC. In case of wet treatment, strong Cu- Cu bonding was observed above bonding temperature of 250oC.
hydrogen plasma, Cu bonding, DCB, adhesion energy
Journal of the Microelectronics and Packaging Society, Vol. 28, No. , pp. 115-115.
Department of Advanced Materials Science and Engineering, Kumoh National Institute of Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 1-7.
The backside metallization process is typically used to attach a chip to a lead frame for semiconductor packaging because it has excellent bond-line and good electrical and thermal conduction. In particular, the backside metal with the Ag/Sn/Ag sandwich structure has a low-temperature bonding process and high remelting temperature because the interfacial structure composed of intermetallic compounds with higher melting temperatures than pure metal layers after die attach process. Here, we introduce a die attach process with the Ag/Sn/Ag sandwich structure to apply commercial semiconductor packages. After the die attachment, we investigated the evolution of the interfacial structures and evaluated the shear strength of the Ag/Sn/Ag sandwich structure and compared to those of a commercial backside metal (Au-12Ge).
backside metallization, die attach, Ag/Sn/Ag sandwich structure, high-temperature semiconductor, soldering
Division of Materials Science and Engineering, Hanyang University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 9-15.
The ‘field-effect’ underlies the operation of most conventional electronic devices. However, effective control and implementation of the field-effect in semiconductor devices are limited due to screening of the electric-field by conducting electrodes. Thus far, the electronic devices have necessarily been designed to avoid or minimize the electricfield screening effect. As an alternative approach to this, a new type of conducting electrodes which would be transparent to both visible light and electric-field while being electrically conductive have been developed. Here, we define these electrodes as ‘electric-field transparent electrodes’ and provide a review on related work. Particular attention is paid to the material selection and design strategies to enhance the electric-field transparency of the electrodes while maintaining good electrical conductivity and optical transparency. We then introduce potential applications of the electric-field transparent electrodes in electronic and optoelectronic devices.
Electric field transparent electrode, electrode, Silver nanowire, Graphene, Graphene mesh
1Department of Mechanical Engineering, Seoul National University of Science and Technology, 2Graduate School of Nano-IT Design Convergence, Seoul National University of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 17-24.
As an interconnect scaling faces a technical bottleneck, the device stacking technologies have been developed for miniaturization, low cost and high performance. To manufacture a stacked device structure, a vertical interconnect becomes a key process to enable signal and power integrities. Most bonding materials used in stacked structures are currently solder or Cu pillar with Sn cap, but copper is emerging as the most important bonding material due to finepitch patternability and high electrical performance. Copper bonding has advantages such as CMOS compatible process, high electrical and thermal conductivities, and excellent mechanical integrity, but it has major disadvantages of high bonding temperature, quick oxidation, and planarization requirement. There are many copper bonding processes such as dielectric bonding, copper direct bonding, copper-oxide hybrid bonding, copper-polymer hybrid bonding, etc.. As copper bonding evolves, copper-oxide hybrid bonding is considered as the most promising bonding process for vertically stacked device structure. This paper reviews current research trends of copper bonding focusing on the key process of Cu-SiO2 hybrid bonding.
Copper Bonding, Hybrid Bonding, Interconnect, 3D Packaging
Department of Materials Science and Engineering, Kangwon National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 25-29.
광화학증착법 (PMOD; photochemical metal-organic deposition)을 이용하여 photoresist 및 etching 공정없이 pattern 된 TiOx resistive switching (RS) 소자를 제작 및 그 특성을 평가하였다. Ti(IV) 2-ethylhexanoate를 출발물질로 사 용하였으며 UV 노출시간 10 min에 광화학반응이 완료됨을 FTIR 분석을 통하여 확인하였다. 200 oC 이하 저온공정에서 직접패턴 된 20 nm 두께의 비정질 TiOx 박막의 균일한 두께의 패턴형성을 Atomic Force Microscopy를 통하여 확인하 였다. 별도의 상형성을 위한 후 열처리 공정 없이 4 μm 선폭의 전극위에 형성된 20 nm 두께의 비정질 TiOx RS 소자는 4V 동작전압에서 on/off ratio 20의 forming-less RS 특성을 나타내었다. Electrochemical migration에 영향을 미치는 grain boundary가 없어 소자간 신뢰성 향상이 기대되며, flexible 기판 또는 저온공정이 요구되는 메모리 소자 공정에서 PMOD 공정이 응용될 수 있음을 보여준다. Selector를 이용하여 crossbar array 구조를 도입할 경우 매우 간단한 구조의 저비용 메모리 소자를 구현할 수 있을 것으로 기대 된다.
This study demonstrates direct-patternable amorphous TiOx resistive switching (RS) device and the fabrication method using photochemical metal-organic deposition (PMOD). For making photosensitive stock solutions, Ti(IV) 2- ethylhexanoate was used as starting precursor. Photochemical reaction by UV exposure was observed and analyzed by Fourier transform infrared spectroscopy and the reaction was completed within 10 minutes. Uniformly formed 20 nm thick amorphous TiOx film was confirmed by atomic force microscopy. Amorphous TiOx RS device, formed as 6 x 6 μm square on 4 μm width electrode, showed forming-less RS behavior in ±4 V and on/off ratio ≈ 20 at 0.1 V. This result shows PMOD process could be applied for low temperature processed ReRAM device and/or low cost, flexible memory device.
Resistive RAM, PMOD, resistive switching, non-volatile memory, patterning process
1Department of Materials Science & Engineering, Kangwon National University, 2Department of Materials Science and Engineering, Yonsei University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 31-35.
원자층 증착법(ALD: atomic layer deposition)으로 성장된 ZnO n-type 산화물 반도체를 이용하여 three terminal memristor (memtransistor) 소자를 제작하여 습도에 따른 그 특성을 관찰하였다. 40 nm 두께의 ZnO 박막을 이용하여 channel width 70 μm, length 5 μm, back gate 구조의 memtransistor 소자를 제작하여 습도에 (40%, 50%, 60%, 70%) 따 른 gate tunable memristive 특성변화를 관찰하였다. 습도가 높아질수록 electron mobility와 gate controllability가 감소하 여 수소도핑효과에 의한 carrier 농도가 증가하는 거동의 output curve가 관찰되었다. 60%, 70%의 습도에서 memristive 거동이 관찰되었으며 습도가 높아질수록 on/off ratio는 증가하는 반면 gate controllability가 감소하였다. 60% 습도에서 가장 우수한 특성의 gate tunable memristive 특성을 얻을 수 있었다.
This study demonstrates metal-oxide based memtransistor device and the gate tunable memristive characteristic using atomic layer deposition (ALD) and ZnO n-type oxide semiconductor. We fabricated a memtransistor device having channel width 70 μm, channel length 5 μm, back gate, using 40 nm thick ZnO thin film, and measured gate-tunable memristive characteristics at each gate voltage (50V, 30V, 10V, 0V, -10V, -30V, -50V) under humidity of 40%, 50%, 60%, and 70% respectively, in order to investigate the relation between a memristive characteristic and hydrogen doping effect on the ZnO memtransistor device. The electron mobility and gate controllability of memtransistor device decreased with an increase of humidity due to increased electron carrier concentration by hydrogen doping effect. The gate-tunable memristive characteristic was observed under humidity of 60% 70%. Resistive switching ratio increased with an increase of humidity while it loses gate controllability. Consequently, we could obtain both gate controllability and the large resistive switching ratio under humidity of 60%.
Memtransistor, Resistive switching, Gate tunability, Hydrogen, Humidity
1School of Materials Science and Engineering, Andong National University, 2SIMMTECH Co., 3ICT device Packaging Research Center, Korea Electronics Technology Institute
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 37-43.
Fan-out wafer level packaging (FOWLP) 재배선 적용을 위한 Ti 박막과 WPR 절연층 사이의 계면 신뢰성을 평가하기 위해, O2 플라즈마 전처리 및 후속 열처리 시간에 따라 90° 필 테스트를 진행하였다. O2 플라즈마 전처리 시간 이 증가 할수록 계면 접착력이 감소하다가 유지되는 거동을 보였으며, 이는 과도한 O2 플라즈마 전처리가 WPR 절연층 내의 C-O-C 또는 C=O 결합을 끊어 WPR 표면이 손상을 받아 계면 접착력이 저하된 것으로 판단된다. 또한 O2 플라즈 마 전처리를 30초 진행한 시편을 150oC 후속 열처리 진행한 결과, 계면 접착력이 0시간에서 24시간까지는 감소하였으 나, 100시간까지 유지되는 거동을 보였다. 이는 고온에 취약한 WPR 절연층이 과도한 열처리로 인해 손상되어 계면 접 착력이 급격히 감소하다가 유지되는 것으로 판단된다. 따라서, 절연층 소재에 대한 최적의 플라즈마 전처리 조건을 확보 하는 것이 FOWLP 재배선의 계면신뢰성 향상을 위한 핵심요소임을 알 수 있다.
The effects of O2 plasma pre-treatment and post-annealing conditions on the interfacial adhesion of Ti thin film and WPR dielectric were investigated using 90o peel test for fan-out wafer level packaging (FOWLP) redistribution layer (RDL) applications. Peel strength between Ti film and WPR dielectric decreased from 8.9±1.3 g/mm to 2.7±0.9 g/ mm for variation of O2 plasma pre-treatment time from 30s to 300s, which is closely related to C-O-C or C=O bonds breakage at the WPR dielectric surface due to excessive plasma pre-treatment conditions. During post-annealing at 150oC, the peel strength abruptly decreased from 0 h to 24 h, and then maintained constant until 100 h, which is also mainly due to the damage of WPR dielectric which is weak to high temperature. Therefore, the optimum plasma pre-treatment conditions on the surface of dielectric is essential to interfacial reliability of FOWLP RDL.
Fan-out wafer level packaging, Redistribution layer, Interfacial adhesion, Peel test, O2 plasma pre-treatment, post-annealing
Graduate School of NID Fusion Technology, Seoul National University of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 45-54.
최근 PCB의 소형화, 박형화 및 고밀도화가 크게 요구되면서 MSAP (Modified Semi Additive Process) 기술 을 이용한 SLP (Substrate Like PCB) 기술이 큰 주목을 받고 있다. 특히 SLP 기술은 스마트폰의 고용량 배터리 개발과 5G 기술에 꼭 필요한 기술이다. 본 연구에서는 기존의 HDI 기술과 MSAP 기술을 혼합하여 제작한 하이브리드 방식의 SLP의 신뢰성을 실험과 수치해석을 이용하여 분석하였다. 특히 최적의 SLP 설계를 위하여 프리프레그(prepreg)의 물성, 두께, 층수, 마이크로비아(microvia)의 크기 및 misalignment가 마이크로비아의 신뢰성에 미치는 영향을 IST (Interconnect Stress Test) 시험을 이용한 열사이클링 신뢰성 실험과 유한요소 수치해석을 통하여 고찰하였다. SLP 소재 인 프리프레그의 열팽창계수가 적을수록 마이크로비아의 신뢰성은 크게 증가하며, 프리프레그의 두께가 얇을수록 신뢰 성이 증가된다. 마이크로비아 홀의 크기 및 패드의 크기가 증가하면 응력이 완화되어 신뢰성은 향상된다. 반면 프리프레 그의 층수가 증가할수록 마이크로비아의 신뢰성은 감소된다. 또한 misalignment가 크면 신뢰성은 감소하였다. 특히 이들 인자들 중에서 프리프레그의 열팽창계수가 마이크로비아의 신뢰성에 가장 큰 영향을 미친다. 수치 응력해석 결과도 실험 결과와 잘 일치하였으며, 응력이 낮을수록 마이크로비아의 신뢰성은 증가하였다. 본 실험과 수치해석의 결과는 향후 SLP 기판 제작 및 신뢰성 향상을 위한 유용한 설계 가이드라인으로 활용될 것으로 판단된다.
Recently, market demands of miniaturization, high interconnection density, and fine pitch of PCBs continuously keep increasing. Therefore, SLP (substrate like PCB) technology using a modified semi additive process (MSAP) has attracted great attention. In particular, SLP technology is essential for the development of high-capacity batteries and 5G technology for smartphones. In this study, the reliability of the microvia of hybrid SLP, which is made of conventional HDI (high density interconnect) and MSAP technologies, was investigated by experimental and numerical analysis. Through thermal cycling reliability test using IST (interconnect stress test) and finite element numerical analysis, the effects of various parameters such as prepreg properties, thickness, number of layers, microvia size, and misalignment on microvia reliability were investigated for optimal design of SLP. As thermal expansion coefficient (CTE) of prepreg decreased, the reliability of microvia increased. The thinner the prepreg thickness, the higher the reliability. Increasing the size of the microvia hole and the pad will alleviate stress and improve reliability. On the other hand, as the number of prepreg layers increased, the reliability of microvia decreased. Also, the larger the misalignment, the lower the reliability. In particular, among these parameters, CTE of prepreg material has the greatest impact on the microvia reliability. The results of numerical stress analysis were in good agreement with the experimental results. As the stress of the microvia decreased, the reliability of the microvia increased. These experimental and numerical results will provide a useful guideline for design and fabrication of SLP substrate.
SLP (substrate like PCB), modified semi additive process (MSAP), microvia, thermal cycling, reliability
Graduate School of NID Fusion Technology, Seoul National University of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 55-65.
반도체 패키지에서 언더필의 사용은 패키지의 응력 완화 및 습기 방지에 중요할 뿐만 아니라, 충격, 진동 시에 패키지의 신뢰성을 향상시키는 중요한 소재이다. 그러나 최근 패키지의 크기가 커지고, 매우 얇아짐에 따라서 언더필의 사용이 오히려 패키지의 신뢰성을 저하하는 현상이 발견되고 있다. 이러한 이슈를 해결하기 위하여 본 연구에서는 언더 필을 대신 할 소재로서 solid epoxy를 이용한 패키지를 개발하여 신뢰성을 향상시키고자 하였다. 개발된 solid epoxy를 스마트 폰의 AP 패키지에 적용하여 열사이클링 신뢰성 시험과 수치해석을 통하여 패키지의 신뢰성을 평가하였다. 신뢰 성 향상을 위한 최적의 solid epoxy 소재 및 공정 조건을 찾기 위하여 solid epoxy 의 사용 개수, PCB 패드 타입 및 solid epoxy의 물성 등, 3 개의 인자가 패키지의 신뢰성에 미치는 영향을 고찰하였다. Solid epoxy를 AP 패키지에 적용한 결과 solid epoxy가 없는 경우 보다, solid epoxy를 적용한 경우가 신뢰성이 향상되었다. 또한 solid epoxy를 패키지의 외곽 4 곳에 적용한 경우 보다는 6 곳에 적용한 경우가 더 신뢰성이 좋음을 알 수 있었다. 이는 solid epoxy가 패키지의 열팽창 에 따른 응력을 완화 시키는 역할을 하여 패키지의 신뢰성이 향상되었음을 의미한다. 또한 PCB 패드 타입에 대한 신뢰 성을 평가한 결과 NSMD (non-solder mask defined) 패드를 사용할 경우가 SMD (solder mask defined) 패드 보다 신뢰 성이 더 향상됨을 알 수 있었다. NSMD 패드의 경우 솔더와 패드가 접합하는 면적이 더 크기 때문에 구조적으로 안정하 여 신뢰성 측면에서 더 유리하기 때문이다. 또한 열팽창계수가 다른 solid epoxy를 적용하여 신뢰성 평가를 한 결과, 열 팽창계수가 낮은 solid epoxy를 사용한 경우가 신뢰성이 더 향상됨을 알 수 있었다.
The use of underfill materials in semiconductor packages is not only important for stress relieving of the package, but also for improving the reliability of the package during shock and vibration. However, in recent years, as the size of the package becomes larger and very thin, the use of the underfill shows adverse effects and rather deteriorates the reliability of the package. To resolve these issues, we developed the package using a solid epoxy material to improve the reliability of the package as a substitute for underfill material. The developed solid epoxy was applied to the package of the application processor in smart phone, and the reliability of the package was evaluated using thermal cycling reliability tests and numerical analysis. In order to find the optimal solid epoxy material and process conditions for improving the reliability, the effects of various factors on the reliability, such as the application number of solid epoxy, type of PCB pad, and different solid epoxy materials, were investigated. The reliability test results indicated that the package with solid epoxy exhibited higher reliability than that without solid epoxy. The application of solid epoxy at six locations showed higher reliability than that of solid epoxy at four locations indicating that the solid epoxy plays a role in relieving stress of the package, thereby improving the reliability of the package. For the different types of PCB pad, NSMD (non-solder mask defined) pad showed higher reliability than the SMD (solder mask defined) pad. This is because the application of the NSMD pad is more advantageous in terms of thermomechanical stress reliability because the solderpad bond area is larger. In addition, for the different solid epoxy materials with different thermal expansion coefficients, the reliability was more improved when solid epoxy having lower thermal expansion coefficient was used.
Solid epoxy, Package reliability, Thermal cycling, Numerical analysis, Solder crack
Department of Mechanical Engineering, Dongyang Mirae University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 67-73.
본 논문에서는 FEM(유한요소) 기법을 사용하여 FCCSP용 임베디드 PCB의 캐비티 구조와 프리프레그 재료 의 종류에 따라 PCB에서 발생한 warpage와 von Mises 응력 해석을 수행하였다. 유한요소 해석에는 1/2 substrate 모델 과 정적해석이 적용되었다. warpage 해석 결과에 의하면 칩이 실장되는 캐비티와 칩의 간격이 증가할수록 warpage가 증 가하였고, 탄성계수와 열팽창계수가 높은 프리프레그 재료를 적용했을 때 warpage가 증가하였다. 응력의 해석결과에 따 르면 칩이 실장되는 캐비티와 칩의 간격의 영향은 프리프레그 재료에 따라 다르게 나타났다. 즉 열팽창계수가 코어재료 보다 월등히 높은 재료를 적용했을 때 칩이 실장되는 캐비티와 칩의 간격이 증가할수록 응력이 증가하였고, 열팽창계수 가 코어재료보다 낮은 프리프레그를 적용하면 응력이 감소하였다. 이와 같은 결과는 신뢰성 관점에서 실장된 칩이 실장 되는 캐비티의 구조와 프리프레그 재료간 상관관계가 있음을 시사하고 있다.
In this paper, we used FEM technique to perform warpage and von Mises stress analysis on PCB according to the cavity structures of embedded PCB for FCCSP and the types of prepreg material. One-half substrate model and static analysis are applied to the FEM. According to the analysis results of the warpage, as the gap between the cavity and the chip increased, warpage increased and warpage increased when prepreg material with higher modularity and thermal expansion coefficient was applied. The analysis results of the von Mises stress show that the effect of the gap between the cavity and the chip varies depending on prepreg material. In other words, when material whose coefficient of thermal expansion is significantly higher than that of core material, the stress increased as the gap between the cavity and the chip increased. When the prepreg with the coefficient of thermal expansion lower than the core material is applied, the result of stress is opposite. These results indicate that from a reliability perspective, there is a correlation between the structure of the cavity where embedded chips are loaded and prepreg material.
Embedded chip, PCB, Cavity, Prepreg, Warpage, Stress, FEM
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 75-89.
Department of Electronic Engineering Sejong University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 1-10.
The technology and market size of image sensors continue to develop thanks to the release of image sensors that exceed 100 million pixels in 2019 and expansion of black box camera markets for vehicles in addition to existing mobile applications. We review the technology flow of image sensors that have been constantly evolving for 40 years since Hitachi launched a 200,000-pixel image sensor in 1979. Although CCD has made inroads into image sensor market for a while based on good picture quality, CMOS image sensor (CIS) with active pixels has made inroads into the market as semiconductor technology continues to develop, since the electrons generated by the incident light are converted to the electric signals in the pixel, and the power consumption is low. CIS image sensors with superior characteristics such as high resolution, high sensitivity, low power consumption, low noise and vivid color continue to be released as the new technologies are incorporated. At present, new types of structures such as Backside Illumination and Isolation Cell have been adopted, with better sensitivity and high S/N ratio. In the future, new photoconductive materials are expected to be adopted as a light absorption part in place of the pn junction.
image sensor, CCD, CIS, resolution, pixel
Department of Materials Science and Engineering, Yonsei University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 11-17.
본 연구에서는 Ag 금속입자가 기능화된 SnO2 나노선을 제작 및 저온 NO2 가스 센싱 특성을 평가하였다. Vapor–liquid–solid 공법을 이용하여 SnO2 나노선을 합성하였고, flame chemical vapour deposition 공법을 이용하여 Ag 금속입자를 SnO2나노선표면에기능화하였다. 합성된 Ag 금속입자가기능화된 SnO2나노선을이용하여 50oC에서 NO2 10 ppm에대한 가스 센싱 테스트를 진행한 결과, 감응도(Rg/Ra) 1.252를얻었다. 본연구를 통하여, 금속입자가 기능화된 나노선을 이용한 저온동작 반도체식 가스센서의 산업 적용을 현실화 할 수 있을 것으로 기대된다.
In this study, Ag-functionalized SnO2 nanowires are presented for NO2 gas sensitive sensors at low temperatures (50oC). SnO2 nanowires were synthesized using vapor-liquid-solid method, and Ag metal particles were functionalized on the surface of SnO2 nanowires using flame chemical vapor deposition method. As a result of the sensing test about Ag-functionalized SnO2 nanowires based sensor, the response (Rg/Ra) to 10 ppm NO2 was 1.252 at 50oC. We believe that metal-functionalizing is a one of good way to increase the feasibility about semiconductor gas sensor.
NO2, Sensor, SnO2, Ag, Nanowires
Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 19-26.
Flexible displays have been evolved into curved, foldable, and rollable as the degree of bending increases. Due to the presence of brittle electrodes (e.g. indium-tin oxide (ITO)) that easily cracked and delaminated under severe bending deformation, lowering mechanical stress of the electrodes has been critical issue. Because of this, mechanical stress of brittle electrode in flexible displays has been analyzed mostly in terms of bending radius. On the other hand, in order to make rollable display, various mechanical components such as roller and spring are needed to roll-up or extend the screen for the rollable display apparatus. By these mechanical components, brittle electrode in the rollable display is subjected to the excessive tensile stress due to the retracting force as well as the bending stress by the roller. In this study, mechanical deformation of rollable OLED display was modeled considering boundary conditions of the apparatus. An analytical modeling based on the classical beam theory was introduced in order to investigate the mechanical behavior of the rollable display. In addition, finite element analysis (FEA) was used to analyze the effect of mechanical components in the apparatus on the brittle electrode. Furthermore, a strategy for improving the mechanical reliability of the rollable display was suggested through controlling the stiffness of adhesives in the display panel.
rollable display, finite element analysis, retracting force, indium tin oxide, soft adhesive
Department of Materials Science and Engineering, Yonsei University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 27-32.
Robust and hydrophobic tetraethoxysilane (TEOS) based silica aerogel was synthesized by supercritical alcohol drying with surface modification using the phenyl based silica co-precursor (PTMS). The aerogels were synthesized by hydrolysis and polycondensation reaction in which TEOS and PTMS in methanol were reacted together in presence of oxalic acid and ammonium hydroxide as the catalysts. Supercritical alcohol dried PTMS/TEOS composite silica aerogel were examined for the hydrophobicity, chemical interaction, surface morphology, and textural characteristics. The hydrophobic silica-based aerogels were characterized by Fourier transform infrared spectroscopy to investigate the presence of functional groups and chemical bonds. The prepared silica demonstrates hydrophobicity (76o-149o), a high specific surface area (398 m2/g to 739 m2/g). The present investigation provides a simple approach to synthesize hydrophobic and thermally stable silica aerogels.
Silica aerogel, Phenyl modification, Hydrophobic, Supercritical drying
1Department of Advanced Chemicals & Engineering, Chonnam National University, 2Optoelectronics Convergence Research Center, Chonnam National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 33-38.
광전기화학적 물분해에서 광전극으로 이용되는 GaN은 전해질에 대해 높은 안정성을 가지고 있으며 물의 산 화 환원준위를 포함하고 있어 외부전압 없이 물분해가 가능하다. 그러나 GaN 광전극의 경우, 재료 자체의 효율이 낮아 상용화하기에는 부족한 실정이다. 본연구에서는 광효율을 향상시키기 위해 Cobalt phosphate(Co-pi) 촉매를 광전기증착 (Photoelectro-deposition)방법을 통하여 GaN 광전극에 도입하였다. Co-pi 촉매 증착 후 SEM, EDS, XPS분석을 진행하 여 Co-pi의증착 여부및증착 정도를 확인하고, Potentiostat를이용해 PEC 특성을 분석하였다. SEM 이미지를 통해 Copi가 GaN 표면 위에 20~25 nm 사이즈의 클러스터 형태로 고르게 증착되어 있는 것을 확인하였다. EDS 및 XPS 분석을 통해 GaN 표면의입자가 Co-pi임을확인하였다. 이후측정된 PEC 특성에서 Co-pi를증착시킨후 0.5 mA/cm2에서 0.75 mA/cm2로향상된 광전류밀도 값을 얻을수있었다. 향상된 원인을 밝히기 위하여, 임피던스및 Mott-Schottky 측정을진 행하였고, 측정 결과, 50.35 Ω에서 34.16 Ω으로 감소한 분극저항(Rp)과증가된 donor 농도(ND) 값을 확인하였다. 물분해 전후, 표면 성분을 분석한 결과 물분해 후에도 Co-pi가남아있음으로써 Co-pi 촉매가 안정적이라는 것을 확인하였다. 이 를 통해, Co-pi가 GaN의 효율 향상을 위한 촉매로서 효과가 있음을 확인하였고, 다른 광전극에 촉매로써 적용시켰을 경 우, PEC 시스템의 효율을 향상시킬 수 있을 것으로 판단된다.
In the photoelectrochemical (PEC) water splitting, GaN is one of the most promising photoanode materials due to high stability in electrolytes and adjustable energy band position. However, the application of GaN is limited because of low efficiency. To improve solar to hydrogen conversion efficiency, we introduce a Cobalt Phosphate (Copi) catalyst by photo-electrodeposition. The Co-pi deposition GaN were characterized by SEM, EDS, and XPS, respectively, which illustrated that Co-pi was successfully decorated on the surface of GaN. PEC measurement showed that photocurrent density of GaN was 0.5 mA/cm2 and that of Co-pi deposited GaN was 0.75 mA/cm2. Impedance and Mott-Schottky measurements were performed, and as a result of the measurement, polarization resistance (Rp) and increased donor concentration (ND) values decreased from 50.35 Ω to 34.16 Ω were confirmed. As a result of analyzing the surface components before and after the water decomposition, it was confirmed that the Co-pi catalyst is stable because Co-pi remains even after the water decomposition. Through this, it was confirmed that Co-pi is effective as a catalyst for improving GaN efficiency, and when applied as a catalyst to other photoelectrodes, it is considered that the efficiency of the PEC system can be improved.
Gallium nitride, Photoelectrode, Oxygen Evolution Catalyst, Water splitting, Co-phosphate, Deposition, Photoelectrochemistry, Hydrogen generation
1Department of Advanced Chemicals & Engineering, Chonnam National University, 2Energy Convergence Core Facility, Chonnam National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 39-44.
최근 웨어러블 장치에 적용하기 위한 유연성 기판에 대한 연구가 활발히 진행되고 있다. 특히, 유연성 기판중 의복에 웨어러블 장치를 적용하기 위한 전도성 섬유기판에 대한 연구가 진행되고 있다. 본연구에서는, 면섬유 기판 표면 에 CNT와 Pd복합 용액을 스프레이 법을 이용하여 형성하였고, 무전해 도금법을 이용하여 금속층을 도금하였다. 도금된 섬유기판의 형상을 분석하기 위하여 SEM 장비를 이용하였고, CNT를증착한 섬유기판의 표면에 Ni 레이어가 형성된것 을 확인하였다. EDS 분석을 통하여 섬유기판의 표면에 형성된 물질이 Ni임을 알 수 있었다. 전기적 특성을 확인하기 위 하여 4-point probe로 무전해 도금을 진행한 섬유기판의 표면저항 및 저항 분포를 확인하기 위한 맵핑을 진행하였다. 무 전해도금의진행시간이길어질수록전도성이 향상되었음을 확인할수있었고, 표면위치별저항의분포가 균일함을알 수있었다. 인장력, 굽힘, 뒤틀림 시험을 통하여 기계적 스트레스로 인한 저항변화를 측정하였다. 그결과 도금 시간이길 어질수록 유연성 기판의 저항변화가 점점 사라지는 것을 확인하였다. UTM(Universal testing machine)을이용하여 도금 시간 변화에 대한 무전해 도금 기판의 기계적 특성 향상 여부에 대하여 분석하였다. 인장강도는 무전해 도금을 2 시간동 안진행한 전도성 섬유기판의 경우, 면섬유 기판보다약 16 MPa 증가하였다. 이러한 결과들을 토대로 Ni-CNT-Fabric 유 연기판은 의류 일체형 전도성 기판으로 이용되기에 충분함을 확인하였고, 이러한 연구 결과는 유연기판, 웨어러블 디바 이스뿐만 아니라 유연성이 필요한 배터리, 촉매, 태양전지 등에 적용되어 발전에 기여할 수 있을 것으로 기대한다.
Recently, numerous researches are being conducted in flexible substrate to apply to wearable devices. Particularly, Conductive substrate researches that can implement the wearable devices on clothing are massive. In this study, we formed fiber substrate spraying CNT and Pd mixed solution on it and plated metal layer with electroless plating. Used SEM equipment and EDS analysis to analysis structure of the plated fiber substrate and discovered Ni layer was created. For check electrical properties, mapping was performed to check surface resistance and distribution of resistance of electroless plated fiber substrate with 4-point probe. It was confirmed that conductivity was improved as the duration of electroless plating was increased, and it was found that distribution of resistance by surface location was uniform. Changes in resistance due to mechanical stress were measured through tensile, bending, and twisting tests. As a result, it was confirmed that resistance change of flexible substrate gradually disappeared as plating time increased. Using UTM (Universal testing machine), it was analyzed mechanical properties of the electroless plated substrate with respect to changes in plating time were improved. In the case of conductive fiber substrate in which electroless plating was performed for 2 hours, tensile strength was increased by 16 MPa than fiber substrate. Based on these results, we found that Ni- CNT-Fabric flexible substrate is adequate for clothing-intergrated conductive substrate and we positively expect that this experiment shows flexible substrate can adapt to and develop not only a wearable device technology but also other fields needing flexibility such as battery, catalyst and solar cell.
Wearable device, Conductive fiber, Flexible substrate, CNT spray, Ni electroless plating
School of Materials Science & Engineering, Andong National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 45-51.
미래의 유연 전자 기기는 고온, 고습 환경 조건에서 사용될 수 있으며 반복적으로 굽히고 펴기를 반복하기 때 문에 장기 신뢰성 확보를 위해서는 환경 조건과 반복 기계적 변형의 효과를 동시에 고려해야 한다. 본 연구에서는 전자 기기에서 가장 일반적으로 사용되는 Al, Ag, Cu 전극을 유연 기판상에 진공 증착한 뒤 환경적인 요건을 상온/일반습도 와 85oC/85% 습도두 가지로 조건에서, 기계적 변형이 없는 평평한 상태와 반복적으로 굽힘 변형을 가해주는 조건의 총 4가지 환경 및 피로 복합 실험을 실시하였다. Al, Ag, Cu 전극 모두 기계적 변형이 없는 평평한 경우에 일반 환경 조건 및 고온/고습 조건 모두 10시간 동안 전기 저항 변화가 발생하지 않았다. 일반 환경 조건에서 굽힘 피로 실험을 진행한 경우, Al, Ag, Cu 전극 모두 금속의 피로 파괴 현상에 의해 10만 싸이클 이후 전기 저항이 약 400%~600% 증가하였다. 고온/고습에서 피로 실험의 경우, Al, Ag 전극은 일반 조건 피로 실험과 결과가 유사하였으나, Cu의경우 고온/고습 피로 실험의 경우 10만 싸이클 이후 전기 저항이 90000% 이상 증가하였다. 이는 부식과 기계적 피로가 동시에 발생할 경우 금속 전극에 매우 심각한 신뢰성 문제를 유발한다는 것을 의미하며, 환경 조건과 기계적 변형을 동시에 고려한 전극 소 재 디자인이 필요하다는 것을 의미한다.
As flexible electronics will be used under high temperature and high humidity with repeated bending deformations, the effects of environmental condition and repeated mechanical deformations are considered simultaneously to achieve long-term reliability. In this study, the mechanical reliability of metal electrodes (Al, Ag, Cu) deposited on flexible polymer substrate is investigated under 4 different conditions: with and without repeated mechanical deformations and normal environmental or high temperature and high humidity conditions (85oC/85%). The mechanical failure does not occur in all the metal electrodes without mechanical deformation even under high temperature and high humidity conditions. The electrical resistance of metal electrode increased about 400% to 600% after 100,000 bending cycles under normal condition. For high temperature and high humidity condition, the electrical resistance of Al and Ag increased similarly. However, the resistance of Cu during bending fatigue test under high temperature and high humidity condition increased over 90000% because of the combined effect of corrosion and mechanical fatigue. This study can give a helpful information for designing electrode materials with high mechanical reliability under high temperature and high humidity.
Flexible, Metal, Temperature, Humidity, Fatigue, Reliability
Graduate School of Technology of Innovation Management, Hanyang University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 53-58.
전기자동차용 전력반도체 패키징 기술에 대한분석을수행하였다. 비정형 데이터인 특허들을 수집하여유효특 허를 도출하여 LDA 기법을 적용한 토픽모델링을 수행하였다. 20개의 토픽으로 분류하였고각토픽별 추출된 단어를통 해기술에 대한 정의를 내렸다. 각토픽의 대한 동향분석을 위해 연도별 빈도수에 대한 회귀분석을 통해 토픽별 Hot토픽 과 Cold 토픽을 도출하여 전력반도체 패키징 기술의 동향을 분석하였다. Hot 토픽의 기술로는 내전압에 따른 패키지 구 조 기술과 입출력 관련 제어 기술, 방열기술을 도출하였고 Cold 토픽 기술로는 인덕턴스 저감기술이 도출되었다.
Analysis of electric semiconductor packaging technology for electric vehicles was performed. Topic modeling using LDA technique was performed by collecting valid patents by deriving valid patents. It was classified into 20 topics, and the definition of technology was defined through extracted words for each topic. In order to analyze the trend of each topic, the trend of power semiconductor packaging technology was analyzed by deriving hot and cold topics by topic through regression analysis on frequency by year. The package structure technology according to the withstand voltage, the input/output-related control technology and the heat dissipation technology were derived as the hot topic technology, and the inductance reduction technology was derived as the cold topic technology.
Topic Model, Power Module, Package, Technology Trend, Patent
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 59-64.
Department of Materials Science and Engineering, University of Seoul
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 1-8.
In this paper, the principles, characteristics and recent studies of the laser micro soldering are reviewed. The factors which influence laser micro welding and soldering are also included. Laser soldering is a non-contact process that transfers energy to solder joint by a precisely controlled laser beam. In recent electronics industry, the demands for laser soldering are increasing due to bonding for complex circuits and local heating in micro-joint. In laser soldering, there are several important factors like laser absorption, laser power, laser scanning speed, and etc, which affect laser solderability. The laser absorption ratio depends on materials, and each material has different absorption or reflectivity for the laser beam, which requires fine adjustment of the laser beam. Laser types and operating conditions are also important factors for laser soldering performance, and these are also reviewed.
Laser micro-soldering, Laser types, Laser power, Electronics packaging
Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 9-19.
기능성 나노박막을 손상 없이 목표기판으로 옮기는 전사 기술은 나노박막 기반의 차세대 응용 제품 개발을 위 한 초석이다. 본 논문에서는 최근 나노박막 전사의 연구 동향을 박막–기판 계면의 박리 원리에 따라 습식 식각 전사, 전 기화학적 박리, 기계식 전사 방법 세 가지로 분류하여 간단하게 살펴볼 것이다. 더 나아가, 손쉽고, 기판 재활용이 가능하 며, 광범위한 적용 가능성을 가지고 있어 유망 기술로 간주되는 기계식 전사 방법에 대하여 파괴 역학적 관점에 초점을 맞추어 다룰 것이다. 마지막으로, 나노박막의 기계식 전사 방법의 기술 성숙도를 향상시키기 위한 향후 도전 과제와 방향 성에 대하여 고찰하고자 한다.
Transferring of functional nanofilms onto target substrates is a cornerstone to developing nanofilm-based nextgeneration applications. In this work, we provide a brief review of recent advances on nanofilm transfer methods by categorizing them into the following three methods: wet-etching transfer, electrochemical delamination, and mechanical transfer. Furthermore, the mechanical transfer method, which is regarded as a promising technology owing to its facile, substrate recyclable, and widely applicable process, is overviewed by focusing on fracture mechanics approaches. Finally, the perspectives and challenges for future development of the mechanical transfer method are discussed.
Nanofilm, Transfer, Adhesion, Crack driving force, Crack deflection
Carbon Materials Application R&D Group, Korea Institute of Industrial Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 21-27.
The importance of floating photovoltaic systems has recently been emerging to address some issues arising from the installation of conventional ground-mounted photovoltaics. Floating photovoltaics have a few advantages such as cutting down land usage, reducing water evaporation or creating algae. Though there is still necessity to supplement with technical issues: mechanical stability, reliability and long-term durability of floaters and modules. In this paper, we focus the current level of packaging development and introduce research trends that could be applied to next-generation floating photovoltaics.
Floating photovoltaic, Packaging, Pontoon, Reliability, Renewable energy
1Joining R&D Group, Korea Institute of Industrial Technology, 2Division of Materials Science and Engineering, Hanyang University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 29-31.
본 연구에서는 무전해 니켈 도금액 pH 변화에 따른 electroless nickel immersion gold (ENIG)/Sn-3.0wt.%Ag- 0.5wt.%Cu(SAC305) 솔더 접합부 취성 파괴 거동에 대하여 평가하였다. ENIG 표면처리를 위한 무전해 니켈 도금액의 pH는 4.0에서 5.5로 변화 시켰다. 무전해 니켈 도금 후 Ni-P 표면 관찰 결과, 도금액의 pH가 낮아질수록 Ni-P 층 nodule 표면에 핀홀이 증가하였다. 솔더링 후 접합부 계면에서는 (Cu,Ni)6Sn5 금속간화합물이 형성되었으며, 무전해 니켈 도금 액의 pH가 증가할수록 솔더접합부의 계면 금속간화합물의 두께는 증가하였다. 고속전단 시험을 통하여 ENIG/SAC305 솔더 접합부의 취성파괴 거동을 확인하였으며, 무전해 니켈 도금액의 pH가 증가할수록 솔더접합부의 전단강도는 감소하 는 경향을 보였다. 또한, 솔더 접합부의 취성 파괴율은 pH가 5일 때 가장 높은 값을 보였다.
The behavior of brittle fracture of electroless nickel immersion gold (ENIG) /Sn-3.0wt.%Ag-0.5wt.%Cu (SAC305) solder joints was evaluated. The pH of the electroless nickel plating solution for ENIG surface treatment was changed from 4.0 to 5.5. As the pH of the Ni plating solution increased, pin hole in the Ni-P layer increased. The thickness of the interfacial intermetallic compound (IMC) of the solder joint increased with pH of Ni plating solution. The high speed shear strength of the SAC305 solder joint on ENIG surface finish decreased with the pH of the Ni plating solution. In addition, the brittle fracture rate of the solder joint was the highest when the pH of the Ni plating solution was 5.
Electroless nickel immersion gold, solder, brittle fracture, Sn-Ag-Cu, Interfacial intermetallic compound
TSP Quality team, DS, Samsung Electronics Co.
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 35-39.
Nonwet (Head in Pillow) 불량은 SMT(surface mount technology) 공정 불량 유형 중 하나로 이 불량은 solder paste misalign, reflow 조건, package warpage, package ball size 등과 같은 인자에 따라 불량이 발생을 한다. 이에 본 논 문은 Nonwet 발생 인자 중 ① reflow 조건 ② package ball & solder paste misalign ③ package ball 크기 type에 대한 인 자를 선정하여 nonwet 실험을 진행하였다. 먼저 reflow 조건의 경우 soldering 시간이 길 경우 nonwet risk가 증가를 하 나, reflow 공정에 N2를 적용할 시 solder ball 산화 억제에 따른 nonwet 개선을 확인 할 수 있었다. 또한 package ball과 solder paste misalign 발생 시 ball과 paste의 접촉 깊이가 20 μm 이하의 경우 nonwet에 취약 했으며, package ball 체면 적이 작을수록 nonwet 관점 개선됨을 확인 할 수 있었다.
Nonwet (Head in Pillow) defect is one of the defects in SMT (surface mount technology) process, the defect is caused by several factors, such as solder paste misalignment, reflow condition, package warpage and package ball size. This paper focused on ① reflow condition ② package ball & solder paste misalignment ③ package ball size for nonwet experiment. The first, on the case of reflow condition, there would be high risk of nonwet defect when the soldering time was increased, but N2 was adopted to reflow process, there could be no or low risk of nonwet defect because of oxidation barrier control. And when the contact depth between Solder ball and solder paste was below 20 μm, there could be high risk of nonwet defect. Also smaller package ball would have low risk of nonwet defect.
Nonwet, Head in Pillow, Small ball, Reflow, Soak time, keeping time, ball misalignment
1JCET STATS ChipPAC Korea LTD., 2Amkor Technology Korea Inc., 3School of Materials Science and Engineering, Andong National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 41-47.
비메모리 반도체 미세 Cu배선의 전기적 신뢰성 향상을 위해 SiNx 피복층(capping layer)과 Cu 배선 사이 50 nm 두께의 Co 박막층 삽입이 계면 신뢰성에 미치는 영향을 double-cantilever beam (DCB) 접착력 측정법으로 평가하였 다. DCB 평가 결과 SiNx/Cu 구조는 계면접착에너지가 0.90 J/m2이었으나 SiNx/Co/Cu 구조에서는 9.59 J/m2으로 SiNx/ Cu 구조보다 약 10배 높게 측정되었다. 대기중에서 200oC, 24시간 동안 후속 열처리 진행한 결과 SiNx/Cu 구조는 0.93 J/m2으로 계면접착에너지의 변화가 거의 없는 것으로 확인되었으나 SiNx/Co/Cu 구조에서는 2.41 J/m2으로 열처리 전보 다 크게 감소한 것을 확인하였다. X-선 광전자 분광법 분석 결과 SiNx/Cu 도금층 사이에 Co를 증착 시킴으로써 SiNx/Co 계면에 CoSi2 반응층이 형성되어 SiNx/Co/Cu 구조의 계면접착에너지가 매우 높은 것으로 판단된다. 또한 대기중 고온에 서 장시간 후속 열처리에 의해 SiNx/Co 계면에 지속적으로 유입된 산소로 인한 Co 산화막 형성이 계면접착에너지 저하 의 주요인으로 판단된다.
The effect of Co interlayer on the interfacial reliability of SiNx/Co/Cu thin film structure for advanced Cu interconnects was systematically evaluated by using a double cantilever beam test. The interfacial adhesion energy of the SiNx/Cu thin film structure was 0.90 J/m2. This value of the SiNx/Co/Cu thin film structure increased to 9.59 J/m2. Measured interfacial adhesion energy of SiNx/Co/Cu structure was around 10 times higher than SiNx/Cu structure due to CoSi2 reaction layer formation at SiNx/Co interface, which was confirmed by X-ray photoelectron spectroscopy analysis. The interfacial adhesion energy of SiNx/Co/Cu structure decreased sharply after post-annealing at 200oC for 24 h due to Co oxidation at SiNx/Co interface. Therefore, it is required to control the CoO and Co3O4 formation during the environmental storage of the SiNx/Co/Cu thin film to achieve interfacial reliability for advanced Cu interconnections.
Cu interconnect, Co, Adhesion, Double-cantilever beam test, Post-annealing
ICT device packaging Research Center, Korea Electronics Technology Institute (KETI)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 49-54.
신축/유연한 전극을 무언가에 접착하거나 전극에 무언가를 접착하기 위해서는 전극의 특성에 맞는 전도성 접 착제가 필요하다. 전도성 접착제는 접착성과 전도성이 필수적으로 요구된다. 특히 접착성 부분은 내구성과 내열성이 요 구되며 기존 접착제와 다르게 전도성까지 보유해야한다. 그러기 위해서는 강도와 접착성이 좋은 에폭시를 접착제로 선정 하였고 여기에 기존 주제와 경화제로 이루어진 2액형 소재가 아닌 가소제와 보강제까지 혼합하여 4액형 소재를 사용하 여 신축/유연성을 고분자에 부여하였다. 전도성 필러는 비저항이 낮은 재료인 은으로 선정하였고 높은 전도성을 위해 3 가지 모양의 Ag 입자를 사용해 패킹성을 높였다. 이렇게 개발된 전도성 접착제와 실제 판매되고 있는 에폭시 기반 전도 성 접착제 2개와 전도성을 비교하였고 실제 판매되고 있는 제품보다 약 10배정도의 우수한 전도성 결과가 도출되었다. 그리고 가소제와 보강제 여부에 따른 전도성, 기계적 특성, 접착력, 강도를 평가하였다. 또한 120oC에서 5분 경화 후에 60%의 인장에도 문제가 없었으며 연필경도는 6H로 우수하게 측정되었다. 3M tape test를 통해 전극의 접착력을 확인한 결과 바인더의 배합 비율에 관계없이 모두 우수한 결과를 보였다. 전극 위에 Cu sheet를 전도성 접착제를 통해 부착시킨 후 접촉저항을 확인한 결과 0.3 Ω으로 우수한 성능을 보였다.
To attach a stretchable/flexible electrode to something or something to on electrode, conductive adhesives must be stretchable/flexible to suit the properties of the electrode. In particular, conductive adhesive require durability and heat resistance, and unlike conventional adhesives, they should also have conductivity. To this end, Epoxy, which has good strength and adhesion, was selected as an adhesive, and a plasticizer and a reinforcement were mixed instead of a two-liquid material consisting of a conventional theme and a hardener, and a four-liquid material was used to give stretchability/flexibility to high molecules. The conductive filler was selected as silver, a material with low resistance, and for high conductivity, three shapes of Ag particles were used to increase packing density. Conductivity was compared with these developed conductive adhesives and two epoxy-based conductive adhesives being sold in practice, and about 10 times better conductivity results were obtained than products being actually sold. In addition, conductivity, mechanical properties, adhesion and strength were evaluated according to the presence of plasticizers and reinforcement agent. There was also no problem with 60% tensile after 5 minutes of curing at 120°C, and pencil hardness was excellently measured at 6H. As a result of checking the adhesion of electrodes through 3M tape test, all of them showed excellent results regardless of the mixing ratio of binders. After attaching the Cu sheet on top of the electrode through conductive adhesive, the contact resistance was checked and showed excellent performance with 0.3 Ω.
Stretchable/flexible conductive adhesive, High hardness, Rapid thermal curing, High conductivity
1Nano-IT Convergence Engineering, Graduate School of Nano-IT-Design Convergence, Seoul National University of Science and Technology, 2Department of Mechanical Engineering, Seoul National University of Science and Technology, 3School of Materials Science and Engineering, Andong National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 55-60.
최근 참단 반도체 패키징 기술은 고성능 SIP(system in packaging) 구조로 발전해 가고 있고, 이를 실현시키기 위해서 구리 대 구리 접합은 가장 핵심적인 기술로 대두되고 있다. 구리 대 구리 접합 기술은 아직 구리의 산화 특성과 고온 및 고압력 공정 조건, 등 해결해야 할 문제점들이 남아 있다. 본 연구에서는 아르곤과 질소를 이용한 2단계 플라즈 마 공정을 이용한 저온 구리 접합 공정의 접합 계면 품질을 정량적 접합 강도 측정을 통하여 확인하였다. 2단계 플라즈 마 공정은 구리 표면에 구리 질화막을 형성하여 저온 구리 접합을 가능하게 한다. 구리 접합 후 접합 강도 측정은 4점 굽 힘 시험법과 전단 시험법으로 수행하였으며, 평균 접합 전단 강도는 30.40 MPa로 우수한 접합 강도를 보였다.
The recent semiconductor packaging technology is evolving into a high-performance system-in-packaging (SIP) structure, and copper-to-copper bonding process becomes an important core technology to realize SIP. Copper-tocopper bonding process faces challenges such as copper oxidation and high temperature and high pressure process conditions. In this study, the bonding interface quality of low-temperature copper-to-copper bonding using a two-step plasma treatment was investigated through quantitative bonding strength measurements. Our two-step plasma treatment formed copper nitride layer on copper surface which enables low-temperature copper bonding. The bonding strength was evaluated by the four-point bending test method and the shear test method, and the average bonding shear strength was 30.40 MPa, showing that the copper-to-copper bonding process using a two-step plasma process had excellent bonding strength.
Copper bonding, Copper nitride, Shear test, Four point bending, 3D packaging
Department of Advanced Materials Engineering, Kyonggi University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 69-72.
본 연구에서는 SnO2 nanoparticles (NPs) 위에 TiO2 NPs를 코팅하여 Quantum Dots Light Emitting Diodes (QLEDs)를 제작하였다. TiO2 NPs는 SnO2 NPs보다 conduction band minimum (CBM) 준위가 낮다. 따라서 SnO2 층과 발광층의 CBM 준위 사이에 위치해 에너지 장벽을 감소시키고, 전자의 이동을 원활하게 할 것으로 예상하였다. QLEDs 는 inverted 구조로 제작되었으며, SnO2 단일층을 사용한 경우보다 발광 특성이 향상된 것을 확인하였다. 이중 전자수송 층을 적용한 이번 연구를 통해 SnO2를 QLEDs에 전자수송층으로 적용할 수 있을 것으로 기대한다.
In this study, the inverted structured electroluminescence (EL) devices were fabricated with double electron transport layers (ETLs). The conduction band minimum (CBM) of TiO2 NPs is lower than SnO2 NPs. Therefore, it is expected that inserting TiO2 NPs between the SnO2 layer and the emission layer (EML) will reduce the energy barrier and transport electrons smoothly. The quantum dot light emitting diodes (QLEDs) with double ETLs showed the enhanced emission characteristics than those with only SnO2 layer. Keywords: SnO2 NPs, TiO2 NPs, Quantum dots, Electron transport layer.
SnO2 NPs, TiO2 NPs, Quantum dots, Electron transport layer
School of Advanced Materials Engineering, Jeonbuk National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 73-76.
은 나노와이어는 금속 특유의 고전도 특성, 낮은 Percolation threshold 및 고투과 특성을 나타내어 차세대 투 명전극 물질로 각광받고 있다. 이를 플렉서블 및 웨어러블 디바이스, 전자피부 디바이스 등과 같은 다양한 분야에 활용하 기 위해서는 은 나노와이어 전극을 필요한 형태로 패터닝 하기 위한 기술이 필수적으로 요구된다. 일반적으로, 은 나노와 이어를 패터닝하기 위한 공법으로는 포토리소그래피 및 에칭, 프린팅, 레이저 Ablation 등을 들 수 있으나, 이러한 패터 닝 기술들은 공정 절차가 복잡하거나 높은 공정 비용 등의 단점이 있다. 이에 본 연구에서는 UV-curable 점착제 기반의 low-cost 은 나노와이어 패터닝 공법을 개발하고자 하였다. 은 나노와이어 네트워크가 형성된 폴리우레탄 필름에 UV 경 화형 테이프를 부착하고, UV를 선택적으로 조사한 뒤, 다시 UV 경화형 테이프를 벗겨내는 3단계의 간단한 공정만으로 은 나노와이어 패턴을 성공적으로 형성할 수 있었으며, 간단한 구현 원리 및 분석 결과를 본 논문에서 보고하고자 한다.
Silver nanowires (AgNWs) intrinsically possess high conductivity, ductility, and network structure percolated in a low density, which have led to many advanced applications of transparent and flexible electronics. Most of these applications require patterning of AgNWs, for which photolithographic and printing-based techniques have been widely used. However, several drawbacks such as high cost and complexity of the process disturb its practical application with patterning AgNWs. Herein, we propose a novel method for the patterning of AgNWs by employing UV-curable adhesive tape with a structure of liner/adhesive layer/polyolefin (PO) film and UV irradiation to simplify the process. First, the UV-curable adhesive tape was attached to AgNWs/polyurethane (PU), and then selectively exposed to UV irradiation by using a photomask. Subsequently, the UV-curable adhesive tape was peeled off and consequently AgNWs were patterned on PU substrate. This facile method is expected to be applicable to the fabrication of a variety of low-cost, shapedeformable transparent and wearable devices.
Silver nanowires (AgNWs), patterning, UV-curable adhesive tape, polyurethane, flexible electronics
Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 77-81.
차세대 디스플레이 시장을 선도하기 위해서는 롤러블(rollable), 폴더블(foldable) 디스플레이와 같은 플렉서블 (flexible) OLED 디스플레이의 상용화 및 양산화가 필수적이나, 실제 공정 및 굽힘 과정에서 발생하는 극심한 박막 내부 응력 변화로 인한 기계적 파손 문제가 심각한 상황이다. 따라서, 플렉서블 디스플레이 구조에 사용되는 박막 재료의 기계 적 물성을 파악하는 것은 제품의 강건한 설계 및 구조 최적화에 필수적이다. 본 논문에서는 물 표면 플랫폼을 이용한 나 노 박막 인장 시험법을 적용하여 플렉서블 디스플레이 패널에 적용되는 금속 및 세라믹 박막 소재들의 인장 물성을 정량 적으로 측정하였다. 스퍼터링(Sputtering)으로 증착된 Mo, MoTi 나노 박막과, 플라즈마 강화 화학 기상 증착법(Plasma Enhanced Chemical Vapor Deposition, PECVD)으로 증착된 SiNx 나노 박막의 탄성 계수와 인장 강도 및 연신율을 측정 하는 데 성공하였다. 결과적으로 박막의 증착 조건 및 두께에 따라 기계적 물성이 크게 변화할 수 있음을 확인하였으며, 측정된 인장 물성은 기계적으로 강건한 롤러블, 폴더블 디스플레이의 설계를 위한 응력 해석 모델링 데이터로 활용될 수 있을 것으로 기대한다.
Commercialization of flexible OLED displays, such as rollable and foldable displays, has attracted tremendous interest in next-generation display markets. However, during bending deformation, cracking and delamination of thin films in the flexible display panels are the critical bottleneck for the commercialization. Therefore, measuring mechanical properties of the fragile thin films in the flexible display panels is essential to prevent mechanical failures of the devices. In this study, tensile properties of the metal and ceramic nano-thin films were quantitatively measured by using a direct tensile testing method on the water surface. Elastic modulus, tensile strength, and elongation of the sputtered Mo, MoTi thin films, and PECVD deposited SiNx thin films were successfully measured. As a result, the tensile properties were varied depending on the deposition conditions and the film thickness. The measured tensile property values can be applied to stress analysis modeling for mechanically robust flexible displays.
Tensile Test, Thin Film, Mechanical Property, Rollable display, Foldable display
1School of Materials Science & Engineering, Research Center for Energy and Clean Technology, Andong National University, 2Department of Materials Science and Engineering, UNIST
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 83-88.
최근 스마트폰 산업의 발전으로 인하여 실사용 환경에서 유연소자의 기계적 거동에 대한 연구가 많이 이루어 지고 있다. 유연소자 박막은 두께가 나노 단위이고, 기존의 시험법으로 측정하기 어려워 주로 나노압입시험을 이용하여 경도, 탄성계수 등의 특성을 구하고 있다. 그러나 현재 널리 쓰이고 있는 분석법(Oliver-Pharr Method)은 기판의 영향이 이론적으로 고려되지 않아 단순히 적용하기에는 무리가 있다. 따라서 본 연구에서는 기판 영향을 고려한 타 연구자들의 모델에 대한 적용성을 확인하고, 압입자와 시편 표면에서 발생하는 소성쌓임 현상(pile-up)에 대해 압입깊이의 보정을 실 시하였다. 유연소자 박막의 탄성계수를 평가하고 검증하기 위하여 폴리이미드 및 실리콘 웨이퍼 기판 위에 금속, 비정질 박막을 증착하여 실제 실험을 수행하여 비교하였다.
The evolution of smartphones has led to numerous researches in the mechanical behavior of flexible devices. Due to the nano-size of the thin flexible film, nanoindentation is widely used to evaluate its mechanical behaviors, such as elastic modulus, and hardness. However, the commonly used Oliver-Pharr method is not suited for analyzing the indentation force-depth curves of hard films on soft substrates, as the effects of soft substrate is not considered theoretically. In this study, the elastic modulus of the thin film was evaluated with references to other reported models which include the substrate effect, and with calibration of the indentation depth for the pile-ups between the indenter and test surface. We fabricated test samples by deposition of amorphous metal film on polyimide and silicon wafers for verification of modified models.
Elastic modulus, Nanoindentation, Thin film, pile-up
1Department of Mechanical Engineering, Korea Advanced Institute of Science and Technology (KAIST), 2Department of Mechanical Engineering, Pohang University of Science and Technology (POSTECH)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 89-93.
반도체 패키지의 경박단소화로 인해 발생하는 복잡한 휨 거동은 내부 응력을 발생시켜 박리나 균열과 같은 다 양한 기계적인 결함을 야기한다. 이에 따른 수율 감소를 막기 위해 휨 거동을 정확하게 예측하려는 노력은 다양한 측면 에서 그 접근이 이루어지고 있다. 이 중 패키지를 구성하는 주 재료인 실리콘 웨이퍼는 일반적으로 균질한 물질로 취급 되어 열에 의한 휨 거동은 전혀 없는 것으로 묘사된다. 그러나 실리콘을 얇게 가공하기 위해서 진행되는 그라인딩과 폴 리싱에 의해 상온에서 휨이 발생한다는 사실이 보고되어 있고, 이는 표면에 형성되는 damage layer가 두께 방향으로 불 균질함을 발생시키는 것으로부터 기인한다. 이에 본 논문에서는 반도체 패키징 공정 중 최고온 공정 과정인 solder reflow 온도에서 단면 연마된 웨이퍼가 나타내는 휨 거동을 측정하고, 이러한 휨 량이 나타나는 원인을 연마된 면과 그렇지 않 은 면의 열팽창계수를 측정함으로써 밝혀내었다. 측정에는 미세 변형률과 형상이 모두 측정 가능한 3차원 디지털 이미지 상관법(Digital Image Correlation; DIC)을 이용하였다.
Complex warpage behavior of the electronic packages causes internal stress so many kinds of mechanical failure occur such as delamination or crack. Efforts to predict the warpage behavior accurately in order to prevent the decrease in yield have been approached from various aspects. For warpage prediction, silicon is generally treated as a homogeneous material, therefore it is described as showing no warpage behavior due to thermal loading. However, it was reported that warpage is actually caused by residual stress accumulated during grinding and polishing in order to make silicon wafer thinner, which make silicon wafer inhomogeneous through thickness direction. In this paper, warpage behavior of the single-side polished wafer at solder reflow temperature, the highest temperature in packaging processes, was measured using 3D digital image correlation (DIC) method. Mechanism was verified by measuring coefficient of thermal expansion (CTE) of both mirror-polished surface and rough surface.
silicon wafer, warpage, digital image correlation, coefficient of thermal expansion, polishing
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 95-.
Dept. of Mechanical System Design Engineering, Seoul Nat’l Univ. of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 1-10.
웨어러블 소자를 구현하기 위한 칩-섬유 접합 기술을 중심으로 전자 섬유에 대한 기술 개발 동향을 소개한다. 전자 부품을 섬유에 접합하기 위해서는 먼저 전자 부품에 전원 공급 및 전기적 신호를 주고 받기 위한 회로를 섬유에 구 성해야 하며, 회로의 해상도와 밀도에 따라 전도성 실을 이용하는 자수법 또는 전도성 페이스트 등을 이용한 프린트법을 통해 구현할 수 있다. 전자 부품과 섬유를 접합하기 위해서는 솔더링, ACF/NCA, 자수법, 크림핑 등의 방법을 이용하여 영구적으로 접합하거나 후크, 자석, 지퍼 등을 이용하여 탈부착이 가능하도록 접합하는 방법이 있으며, 접합 배선의 밀도 및 용도에 따라서 단독 또는 융합하여 사용한다. 접합 이후에는 방수 등 사용환경에서의 신뢰성을 확보하기 위해 encapsulation 작업을 수행해야 하며, 현재는 PDMS 등의 폴리머를 이용한 방법이 널리 쓰이고 있다.
This paper reviews the recent development of electronic textile technology, mainly focusing on chip-textile bonding. Before the chip-textile bonding, a circuit on the textile should be prepared to supply the electrical power and signal to the chip mounted on the fabrics. Either embroidery with conductive yarn or screen-printing with the conductive paste can be applied to implement the circuit on the fabrics depending on the circuit density and resolution. Next, chiptextile bonding can be performed. There are two choices for chip-textile bonding: fixed connection methods such as soldering, ACF/NCA, embroidery, crimping, and secondly removable connection methods like a hook, magnet, zipper. Following the chip-textile bonding process, the chip on the textile is generally encapsulated using PDMS to ensure reliability like water-proof.
e-textile, fabric, bonding, embroidering, crimping, soldering
1Interdisciplinary Program for Photonic Engineering, Chonnam National University, 2Department of Chemistry Education and Optoelectronic Convergence Research Center, Chonnam National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 11-17.
Copper has been proved to be the best catalyst for electrochemical CO2 reduction reaction, however, for optimal efficiency and selectivity, its performance requires improvements. Electrochemical CO2 reduction reaction (RR) using CuO nanowire electrode was performed with different concentrations of KHCO3 electrolyte (0.1 M, 0.5 M, and 1 M). Cu(OH)2 was formed on Cu foil, followed by thermal-treatment at 200°C under the air atmosphere for 2 hrs to transform it to the crystalline phase of CuO. We evaluated the effects of different KHCO3 electrolyte concentrations on electrochemical CO2 reduction reaction (RR) using the CuO nanowire electrode. At a constant current (5mA), low concentrated bicarbonate exhibited a more negative potential -0.77 V vs. Reversible Hydrogen Electrode (RHE) (briefly abbreviated as VRHE), while the negative potential reduced to -0.33 VRHE in the high concentration of bicarbonate solution. Production of H2 and CH4 increased with an increased concentration of electrolyte (KHCO3). CH4 production efficiency was high at low negative potential whereas HCOOH was not influenced by bicarbonate concentration. Our study provides insights into efficient, economically viable, and sustainable methods of mitigating the harmful environmental effects of CO2 emission.
CuO nanowire, electrolyte concentration, CH4, faradaic efficiency
School of Materials Science and Engineering, Kyungpook National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 19-24.
열처리 공정을 이용하여 Si 도핑된 n형 β-Ga2O3의 전기적 특성을 변화시킨 후 전도도 변화 메커니즘에 대한 분석을 진행하였다. β-Ga2O3 시편들은 공기 또는 N2 분위기에서 800oC~1,200oC 온도범위 내에서 30분 동안 열처리되었 다. 우선 열처리로 인한 결정성 개선은 전기 전도도에 영향을 미치지 않음을 확인하였다. 하지만 공기중 열처리된 시편은 전도성이 악화된 반면 N2 열처리된 시편은 Hall 캐리어 농도와 이동도가 일부 개선되는 경향성을 보였다. X-ray photoemission spectroscopy(XPS)분석 결과, 산소공공(VO)의 농도는 가스 분위기에 상관없이 모든 열처리된 시편에서 증 가하는 경향성을 보였다. 공기중 열처리된 시편에서의 VO 농도 증가는 β-Ga2O3내 VO가 Shallow donor가 아님을 보여주 는 결과로 볼 수 있다. 그러므로 N2 열처리된 시편은 VO가 아닌 다른 메커니즘에 의해서 전도도가 향상되었을 가능성이 높다. Si의 경우 SiOx 결합상태를 보이는 Si의 농도가 열처리 온도 증가에 따라 증가하는 경향성을 보였다. 특이하게도 SiOx의 Si 2p peak의 면적 증가는 기존 Si의 화학적 변화 보다는 XPS 측정 영역내 Si농도 증가로 보였으며, SiOx와 전기 전도도와의 상관성은 확인할 수 없었다. 결론적으로 본 연구를 통해 기존 보고된 실험결과와 달리 VO가 Deep donor임을 확인하였다. 이와 같은 β-Ga2O3 전도성의 결함 및 불순물 의존도에 대한 연구는 β-Ga2O3의 전기적 특성의 근본적인 이 해를 바탕으로 물성 개선에 기여할 것으로 본다.
In this work, the electrical property of Si-doped β-Ga2O3 was investigated via a post-growth annealing process. The Ga2O3 samples were annealed under air (O-rich) or N2 (O-deficient) ambient at 800~1,200oC for 30 mins. There was no correlation between the crystalline quality and the electrical conductivity of the films within the experimental conditions explored in this work. However, it was observed the air ambient led to severe degradation of the film’s electrical conductivity while N2-annealed samples exhibited improvement in both the carrier concentration and Hall mobility measured at room temperature. Interestingly, the x-ray photoemission spectroscopy (XPS) revealed that both annealing conditions resulted in higher concentration of oxygen vacancy (VO). Although it was a slight increase for the air-annealed sample, high resistivity of the film strongly suggests that VO cannot be a shallow donor in β-Ga2O3. Therefore, the enhancement of the electrical conductivity of N2-annealed samples must be originated from something other than VO. One possibility is the activation of Si. The XPS analysis of N2-annealed samples showed increasing relative peak area of Si 2p associated with SiOx with increasing annealing temperature from 800 to 1,200oC. However, it was unclear whether or not this SiOx was responsible for the improvement as the electrical conductivity quickly degraded above 1,000oC even under N2 ambient. Furthermore, XPS suggested the concentration of Si actually increased near the surface as opposed to the shift of the binding energy of Si from its initial chemical state to SiOx state. This study illustrates the electrical changes induced by a post-growth thermal annealing process can be utilized to probe the chemical and electrical states of vacancies and dopants for better understanding of the electrical property of Si-doped β-Ga2O3.
β-Ga2O3, electrical conductivity, oxygen vacancy, Si activation, XPS
1Department of Advanced Chemicals & Engineering, Graduate School Chonnam National University, 2School of Chemical Engineering, Chonnam National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 25-37.
본 연구에서는 그래핀 소재의 전기전도성 및 자기적 특성을 향상시키기 위해 산화그래핀 표면상의 산소를 포 함한 기능기와 열처리 환원공정을 이용하여 환원그래핀과 금속소재를 하리브리드화 하였다. 산화 그래핀 표면의 –OH, - COOH 등의 산소 포함 기능기들을 열처리 환원시킴과 동시에 금속이온을 기능기와의 이온교환법에 의해 치환 합성하는 연구를 진행하였다. 하이브리드 소재 합성에 사용된 금속은 Fe, Ag, Ni, Zn, Fe/Ag이며 SEM, TEM 및 EDS를 통해 환 원 그래핀 표면 위에 균일한 크기의 금속 입자가 비교적 구형 잘 분산되었음을 확인하였다. 그래핀 표면상의 금속입자들 은 모두 산화물 형태의 구조를 가지고 있었다. 하이브리드 소재의 전기적 특성을 확인하기 위해 rGO-metal hybrid 시료 를 PET film에 dip-coating 방법으로 후막 필름을 형성시킨 후 면저항을 측정하였고, SEM을 통해 시편의 두께를 측정하 여 비저항을 계산한 결과, 비저항의 범위는 2.14×10−5 ~ 3.5×10−3 ohm/cm범위에 있음을 확인하였다.
In this study, hybridization of graphene oxide and metal was carried out by the functional groups containing oxygen and thermal treatment for reduction in order to enhance the electrical conductivity and magnetic properties of graphene materials. Graphene-metal hybrid materials were synthesized using the oxygen-containing functional groups (- OH, -COOH and so on) on the surface of graphene oxide by replacing them with metal ions via ion exchange method as well as thermal reduction. The metals used in this study were Fe, Ag, Ni, Zn, and Fe/Ag, and it was confirmed that metal particles of uniform size were well dispersed on the graphene surface through SEM, TEM, and EDS. All of the metal particles on the graphene surface had an oxide-crystalline structure. To check the electrical properties, sheet resistance of the rGO-metal hybrid sample was measured on the PET film made by the dip-coating, and the specific resistance was calculated by measuring the thickness of the specimen through SEM. As a result, the specific resistance was in the range of 2.14×10−5 and 3.5×10−3 ohm/cm.
graphene oxide, metal, hybrid, reduced graphene, resistivity
1Department of Advanced Chemicals & Engineering, Chonnam National University, 2Optoelectronics Convergence Research Center, Chonnam National University, 3Energy Convergence Core Facility, Chonnam National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 39-45.
The Cu/Cu2O/CuO photoelectrode has been successfully fabricated by Rapid Thermal Annealing technique. The structural characterization of fabricated photoelectrode was performed using X-Ray diffraction, while elemental composition of the prepared material has been checked with X-Ray Photoelectron Spectroscopy. The synthesis parameters are optimized on the basis of photoelectrochemical performance. The best photoelectrochemical performance has been observed for the Cu/Cu2O/CuO photoelectrode fabricated at 550 oC oxidation temperature and oxidation time of 50 seconds with highest photocurrent density of -3 mA/cm2 at -0.13 V vs. RHE.
Cu, Cu2O, CuO, Oxidation, Photoelectrode, Water splitting
1Department of Physics, Chonnam National University, 2OE Solutions
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 47-54.
활성 도파로와 수동 도파로의 집적은 광집적 회로의 구성에서 필수적인 요소이다. 이를 구현하기 위한 여러 기 술 중 버트 조인트는 상당한 장점을 가지고 있다. 그러나 버트 조인트 접합은 높은 광손실을 야기하며, 두 도파로 간의 정 렬에 있어서 정확한 공정 제어가 요구되는 구조이다. 본 논문에서는 레이저 다이오드와 spot size converter (SSC)로 구 성된 집적 소자를 시뮬레이션하기 위해 beam propagation method을 이용하였다. 상이한 모드 특성을 갖는 두 SSC를 레 이저 도파로와 연결하고, 광결합 효율을 시뮬레이션 하였다. 큰 근접장 모드를 가지는 SSC는 낮은 광결합 효율을 보여주 나, 원거리 발산각 패턴이 좁고 더 대칭적이다. 테이퍼 구조의 수동 도파로는 원거리 발산각 패턴을 열화시키지 않고 버 트 조인트에서 도파로 오프셋의 무의존성과 광결합 효율을 향상시키기 위해 이용되었다. 이를 바탕으로 89.6%의 높은 광 결합 효율과 16°×16°의 좁은 원거리장 발산각을 얻을 수 있었다.
Integration of active and passive waveguides is an essential component of the photonic integrated circuit and its elements. Butt joint is one of the important technologies to accomplish it with significant advantages. However, it suffers from high optical loss at the butt joint junction and need of accurate process control to align both waveguides. In this study, we used beam propagation method to simulate an integrated device composed of a laser diode and spot size converter (SSC). Two SSCs with different mode properties were combined with laser waveguide and optical coupling efficiency was simulated. The SSC with larger near field mode showed lower coupling efficiency, however its far field pattern was narrower and more symmetric. Tapered passive waveguide was utilized for enhancing the coupling efficiency and tolerance of waveguide offset at the butt joint without degrading the far field pattern. With this technique, high optical coupling efficiency of 89.6% with narrow far field divergence angle of 16°×16° was obtained.
waveguide, photonic integrated circuit, butt joint, spot size converter, coupling efficiency, far field
1New & Renewable Energy Research Center, Korea Electronics Technology Institute, 2Nanomecca
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 55-60.
태양광 발전소에 설치된PERC 태양광 모듈 스트링-어레이는 고전압의 전위차로 인해 여전히 potential-induced degradation(PID) 열화 현상이 여전히 보고되고 있다. 이는 태양전지 모듈 커버글라스의 Na+ 이온이 태양전지 봉지재 (EVA)를 투과하여 셀 표면으로 전이되고 결함이 많이 분포되어 있는 ARC(SiOx/SiNx) 계면에 양전하가 축적됨으로써 shunt-Resistance(Rsh)가 감소되고 누설전류량이 증가되어 태양전지 출력이 저하되는 현상이다. 본 연구에서는 이를 방지 하기 위해 나노임프린트 리소그래피(nano-imprint lithography, NIL) 방식을 이용하여 모스아이(Moth-eye) 나노 구조를 광학 필름 후면에 증착 하였고, 이를 커버글라스와 EVA 사이에 삽입하여 태양광 미니 모듈을 구성하였다. PID 열화 현 상을 확인하기 위해 IEC 62804-1 규격에 기반한 셀 단위 PID 열화가속시험을 진행하였고, Light I-V, Dark I-V 분석을 통해 출력(Pmax), 효율(Efficiency), 병렬 저항(shunt resistance)을 확인하였다. 그 결과 기존의 태양전지는 초기 효율 19.76%에서 6.3% 감소하였으나 모스아이 나노 구조 광학 필름(Moth-eye film)이 적용된 태양전지는 0.6% 만 감소하여 PID 열화 현상이 방지되는 것을 확인하였고, 모스아이 나노구조를 통해 투과도가 4% 향상되어 미니 모듈 출력이 2.5% 향상되었다.
The PERC photovoltaic (PV) modules installed in PV power plant are still reports potential-induced degradation (PID) degradation due to high voltage potential differences. This is because Na+ ions in the cover glass of PV modules go through the encapsulant (EVA) and transferred to the surface of solar cells. As positive charges are accumulated at the ARC (SiOx/SiNx) interface where many defects are distributed, shunt-resistance (Rsh) is reduced. As a result, the leakage current is increased, and decrease in solar cell’s power output. In this study, to prevent of this phenomenon, a Moth-eye nanostructure was deposited on the rear surface of an optical film using Nano-Imprint Lithography method, and a solar mini-module was constructed by inserting it between the cover glass and the EVA. To analyze the PID phenomenon, a cell-level PID acceleration test based on IEC 62804-1 standard was conducted. Also analyzed power output (Pmax), efficiency, and shunt resistance through Light I-V and Dark I-V. As a result, conventional solar cells were decreased by 6.3% from the initial efficiency of 19.76%, but the improved solar cells with the Motheye nanostructured optical film only decreased 0.6%, thereby preventing the PID phenomenon. As of Moth-eye nanostructured optical film, the transmittance was improved by 4%, and the solar module output was improved by 2.5%.
Nano imprint lithography, Moth-eye structure, PERC solar Cell, Conversion Efficiency, Potential-induced degradation.
Department of Materials Science and Engineering, Hongik University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 61-65.
열전소재의 격자열전도도 저감은 열전성능 증대를 위해 가장 빈번하게 사용되는 방법이다. 하지만 전체 열전 도도에서 다른 열전도도 기여분을 제외하는 방법으로만 격자열전도도를 구할 수 있기 때문에 격자열전도도를 정확하게 분석하는 것을 간단한 작업이 아니다. 본 연구에서는 먼저 전자/홀에 의한 열전도도 기여분 (모든 소재 적용)과 쌍극 전 도에 의한 기여분 (작은 밴드 갭 소재 적용)을 정확하게 계산해야만 격자열전도도를 정확하게 분석할 수 있음을 설명한 다. 전자/홀에 의한 기여분을 계산하기 위해 필수적인 로렌츠 숫자 계산법 (싱글 파라볼릭 모델링 및 간단한 식 이용)과 쌍극 전도에 의한 기여분 계산법 (투 밴드 모델링) 또한 소개한다. 격자열전도도의 정확한 분석은 격자열전도도 저감을 위한 여러 결함 제어 전략의 효과를 객관적으로 평가할 수 있는 강력한 분석 도구로 사용될 수 있다.
Suppressing lattice thermal conductivity of thermoelectric materials is one of the most popular approach to improve their thermoelectric performance. However, accurate characterization of suppressed lattice thermal conductivity is challenging as it can only be acquired by subtracting other contributions to thermal conductivity from the total thermal conductivity. Here we explain that electronic thermal conductivity (for all materials) and bipolar thermal conductivity (for narrow band gap materials) need to be determined accurately first to characterize the lattice thermal conductivity accurately. Methods to calculate Lorenz number for electronic thermal conductivity (via single parabolic model and using a simple equation) and bipolar thermal conductivity (via two-band model) are introduced. Accurate characterization of the lattice thermal conductivity provides a powerful tool to accurately evaluate effect of different defect engineering strategies.
thermoelectric, Lorenz number, lattice thermal conductivity, bipolar thermal conductivity
ICT · Device Packaging Research Center, Korea Electronics Technology Institute (KETI)
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 67-75.
본 논문에서는 LCP(Liquid Crystal Polymer) 기판을 적용하여 35 GHz 대역 회로에서 사용될 수 있는 커패시 터 및 인덕터를 다양한 용량으로 구현하였다. 회로에 적용하는 데에 따라 높은 용량을 갖는 수동소자가 필요하고, 이는 기본 구조인 전극형 커패시터와 Spiral 구조 인덕터로 설계할 수 있으나, 이 구조는 SRF(Self-Resonant Frequency)가 사 용 주파수인 35 GHz 보다 낮아 고주파 영역에서는 사용 불가능하다. 이러한 주파수 한계를 발견하여, 본 논문에서는 DC 와 고주파 영역 사용 수동소자를 분류하여 고안하였다. 기본 구조는 DC와 같은 낮은 주파수 사용에 적합하며, 35 GHz 대역인 고주파용으로는 마이크로스트립 λ/8 길이 stub 구조로 설계하였으며, open 및 short stub 구조는 각각 커패시터 및 인덕터로 동작하고, stub의 임피던스로부터 계산식을 통해 용량 값을 추출할 수 있다. 유전율 2.9인 LCP 기판으로 제작 하고 측정하여, DC 사용 기본 구조 커패시터와 인덕터는 각각 1.12 ~ 13.9 pF, 0.96 ~ 4.69 nH 용량의 라이브러리를 구성 하였다. 고주파 영역에서 사용 가능한 stub 구조의 커패시터와 인덕터는 각각 0.07 ~ 2.88 pF, 0.34 ~ 1.27 nH 으로 라이 브러리를 구축하였다. 측정을 통해 용량 값을 다양화하는 방법을 검증하였으므로 더욱 세분화된 라이브러리를 구축할 수 있으며, 이들은 사용 주파수 35 GHz 대역의 TRM(Transmit-Receive Module)에서 동작 회로와 집적화가 가능하고, 회로 에 적절히 활용될 수 있는 수동소자의 대안이 될 것이다.
In this paper, by applying LCP substrate, the capacitor and inductor are implemented with a variety of value that can be used in 35 GHz circuits. Depending on how to apply it to the circuit, it is required high value by designing the basic structures such as electrode capacitor and spiral inductor. However they are not available in high-frequency domain, because their SRF(Self-Resonant Frequency) is lower than the frequency of 35-GHz. By finding the limit, this paper devised classifying passive devices for the DC and the high-frequency domain. The basic structure is suitable for DC and microstrip λ/8 length stub structure can be used for high-frequency. The open and short stub structure operate as a capacitor and inductor respectively in the frequency of 35 GHz. If their impedance is known, it is possible to extract the value through the impedance-related equation. By producing with the permittivity 2.9 LCP substrate, the basic structure which are available in the DC constituted a library of capacitance of 1.12 to 13.9 pF and inductance of 0.96 to 4.69 nH, measured respectively. The stub structure available in the high-frequency domain were built libraries of capacitance of 0.07 to 2.88 pF and inductance of 0.34 to 1.27 nH, calculated respectively. The measurements have proven how to diversify value, so libraries can be built more variously. It is possible to integrate with the operation circuit of TRM(Transmit- Receive Module) for the frequency 35-GHz, it will be an alternative to the passive devices that can be properly utilized in the circuit.
LCP, capacitor, inductor, passive device, stub
Department of Materials Science & Engineering, Kangwon National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 77-81.
Resistive RAM (ReRAM)은 전이금속 산화물의 저항변화 특성을 이용하는 차세대 비휘발 메모리로 전이금속 산화물 내의 산소공공의 재분포를 통한 저항변화 특성을 이용한다. 따라서 저항변화 특성을 위해 전이금속산화물 내에는 일정량 이상의 산소공공이 요구되며 이를 위해서는 박막 형성 공정에서 산화 수를 조절할 수 있는 공정이 필요하다. 본 연구에서는 직접패턴이 가능한 photochemical metal organic deposition (PMOD) 공정을 사용하여 UV 노출에 의해 photochemical metal organic precursor의 ligand가 분해되는 과정에서 전기장을 인가하여 박막내의 산화 수를 조절하는 실 험을 진행하였다. Electric field assisted PMOD (EFAPMOD) 법을 이용하여 FeOx 박막의 산화 수 조절이 가능함을 x-ray photoelectron spectroscopy (XPS) 분석과 I-V 측정을 통하여 확인하였으며, EFAPMOD 공정 중 인가하는 전압의 크기를 조절하여 박막의 산화 수를 조절할 수 있음을 확인하였다. 따라서 EFAPMOD 공정 중 인가전압의 크기를 이용하여 저항 변화 특성에 적합한 적정한 산화수를 가지는 금속산화물 박막을 얻고 그 저항변화 특성을 조정할 수 있음을 확인하였다.
Resistive RAM (ReRAM) is a strong candidate for the next-generation nonvolatile memories which use the resistive switching characteristic of transition metal oxides. The resistive switching behaviors originate from the redistribution of oxygen vacancies inside of the oxide film by applied programming voltage. Therefore, controlling the oxygen vacancy inside transition metal oxide film is most important to obtain and control the resistive switching characteristic. In this study, we introduced an applying electric field into photochemical metal-organic deposition (PMOD) process to control the oxidation state of metal oxide thin film during the photochemical reaction by UV exposure. As a result, the surface oxidation state of FeOx film could be successfully controlled by the electric field-assisted PMOD (EFAPMOD), and the controlled oxidation states were confirmed by x-ray photoelectron spectroscopy (XPS) I-V characteristic. And the resistive switching characteristics with the oxidation-state of the surface region could be controlled effectively by adjusting an electric field during EFAPMOD process.
Iron oxide, Resistive switching, ReRAM, Photochemical metal-organic deposition, Electric field assisted
1Department of Materials Science and Engineering, Pukyong National University (PKNU), 2Electronic Convergence Materials Division, Korea Institute of Ceramic Engineering & Technology (KICET), 3Eloi Materials Lab (EML) Co. L
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 83-89.
지난 수십년간 인류에게 핵심적인 에너지 자원이었던 화석연료가 갈수록 고갈되고 있고, 산업발전에 따른 오 염이 심해지고 있는 환경을 보호하기 위한 노력의 일환으로, 친환경 이차전지, 수소발생 에너지 장치, 에너지 저장 시스 템 등과 관련한 새로운 에너지 기술들이 개발되고 있다. 그 중에서도 리튬이온 배터리 (Lithium ion battery, LIB)는 높은 에너지 밀도와 긴 수명으로 인해, 대용량 배터리로 응용하기에 적합하고 산업적 응용이 가능한 차세대 에너지 장치로 여 겨진다. 하지만, 친환경 전기 자동차, 드론 등 증가하는 배터리 시장을 고려할 때, 수명이 다한 이유로 어느 순간부터 많 은 양의 배터리 폐기물이 쏟아져 나올 것으로 예상된다. 이를 대비하기 위해, 폐전지에서 리튬 및 각종 유가금속을 회수 하는 공정개발이 요구되는 동시에, 이를 재활용할 수 있는 방안이 사회적으로 요구된다. 본 연구에서는, 폐전지의 재활용 전략소재 중 하나인, 리튬이온 배터리의 대표적 양극 소재 Li2CO3의 나노스케일 패턴 제조 방법을 소개하고자 한다. 우 선, Li2CO3 분말을 진공 내 가압하여 성형하고, 고온 소결을 통하여 매우 순수한 Li2CO3 박막 증착용 3인치 스퍼터 타겟 을 성공적으로 제작하였다. 해당 타겟을 스퍼터 장비에 장착하여, 나노 패턴전사 프린팅 공정을 이용하여 250 nm 선 폭 을 갖는, 매우 잘 정렬된 Li2CO3 라인 패턴을 SiO2/Si 기판 위에 성공적으로 형성할 수 있었다. 뿐만 아니라, 패턴전사 프 린팅 공정을 기반으로, 금속, 유리, 유연 고분자 기판, 그리고 굴곡진 고글의 표면에까지 Li2CO3 라인 패턴을 성공적으로 형성하였다. 해당 결과물은 향후, 배터리 소자에 사용되는 다양한 기능성 소재의 박막화에 응용될 것으로 기대되고, 특히 다양한 기판 위에서의 리튬이온 배터리 소자의 성능 향상에 도움이 될 것으로 기대된다.
For the past few decades, as part of efforts to protect the environment where fossil fuels, which have been a key energy resource for mankind, are becoming increasingly depleted and pollution due to industrial development, ecofriendly secondary batteries, hydrogen generating energy devices, energy storage systems, and many other new energy technologies are being developed. Among them, the lithium-ion battery (LIB) is considered to be a next-generation energy device suitable for application as a large-capacity battery and capable of industrial application due to its high energy density and long lifespan. However, considering the growing battery market such as eco-friendly electric vehicles and drones, it is expected that a large amount of battery waste will spill out from some point due to the end of life. In order to prepare for this situation, development of a process for recovering lithium and various valuable metals from waste batteries is required, and at the same time, a plan to recycle them is socially required. In this study, we introduce a nanoscale pattern transfer printing (NTP) process of Li2CO3, a representative anode material for lithium ion batteries, one of the strategic materials for recycling waste batteries. First, Li2CO3 powder was formed by pressing in a vacuum, and a 3-inch sputter target for very pure Li2CO3 thin film deposition was successfully produced through high-temperature sintering. The target was mounted on a sputtering device, and a well-ordered Li2CO3 line pattern with a width of 250 nm was successfully obtained on the Si substrate using the NTP process. In addition, based on the nTP method, the periodic Li2CO3 line patterns were formed on the surfaces of metal, glass, flexible polymer substrates, and even curved goggles. These results are expected to be applied to the thin films of various functional materials used in battery devices in the future, and is also expected to be particularly helpful in improving the performance of lithium-ion battery devices on various substrates.
Lithium-ion battery, SPS, Sputtering, Nanotransfer printing, Li2CO3
1Department of Electronic Engineering, Korea National University of Transportation, 2Ibule Photonics
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 91-96.
Pb(In1/2Nb1/2)O3-Pb(Mg1/3Nb2/3)O3-PbTiO3계 압전 단결정의 유전특성과 압전특성을 전계 및 압축응력 인가 조 건 하에서 33-모드 방식으로 측정하였다. 110~140oC 영역에서 저온 rhombohedral 구조에서 고온 tetragonal 구조로의 상 전이가 관찰되었으며, cubic 구조로 변화하는 큐리온도는 165oC 정도로 나타났다. 압축응력 및 전계 변화에 따른 분극의 크기변화를 측정하였다. 전계인가 분극 곡선의 기울기로부터 비유전율을 계산하였고, 인가되는 응력의 크기가 증가할수 록 계산된 비유전율의 크기는 증가하고, 인가되는 전계의 크기가 증가할수록 비유전율의 크기는 감소하는 경향성을 나타 내었다. 압축응력 및 전계 변화에 따른 변위 거동을 측정하였으며, 곡선의 기울기로부터 압전상수를 계산하였고 압력인 가에 따른 상전이를 확인하였다. 수중 또는 의료용 초음파 발진자로 실제 응용할 경우 선형성을 유지하여 구동이 가능하 기 위하여 소자 기구물을 형성하는 단계에서 인가하게 되는 압축응력의 크기와 구동 전계의 DC 바이어스의 크기를 적절 하게 설계할 필요가 있다.
The 33-mode dielectric and piezoelectric properties of Pb(In1/2Nb1/2)O3-Pb(Mg1/3Nb2/3)O3-PbTiO3 piezoelectric single crystals were measured under large electric field and compressive stress. The phase transition from the low temperature rhombohedral to the high temperature tetragonal structure was observed in the range of 110~140oC, and the Curie temperature changing to the cubic structure was about 165oC. The polarization change according to the compressive stress and electric field was measured. Relative dielectric constant was calculated from the slope of the polarization curve applied to the electric field, and the calculated relative dielectric constant increased as the applied stress increased, and the relative dielectric constant decreased as the applied electric field increased. The strain according to the compressive stress and electric field change was measured, the piezoelectric constant was calculated from the slope of the curve, and the phase transition according to the application of pressure was confirmed. In the case of practical application as an underwater or medical ultrasonic actuator, it is necessary to properly design the magnitude of the compressive stress applied to the device and the DC bias in order to maintain linear driving.
Pb(Mg1/2Nb1/2)O3, PbTiO3, single crystal, large electric field, dielectric property, piezoelectric property
Graduate School of NID Fusion Technology, Seoul National University of Science and Technology
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 97-105.
최근 초고속 이더넷(ethernet)의 데이터 및 동작주파수 속도가 증가하고 있으며, 이에 따라 EMI (electromagnetic interference)가 증가하고 있다. 이러한 EMI의 발생은 주변 전자기기들에 영향을 미쳐 오동작 원인이 될 가능성이 높다. 본 연구에서는 고속 이더넷 스위치 EMI 발생의 주요 원인인 DC-DC SMPS (switching mode power supply)에서 발생하는 EMI 저감을 위해 EMI 필터를 적용하였다. EMI 필터소자는 소형화, 양산화에 장점을 가지며, 내 전압(dielectric voltage) 특성이 우수한 MLCC (multi-layer ceramic capacitor)를 사용하였다. MLCC 필터는 X-커패시터 및 X, Y-커패시터로 구성되어 있다. X-커패시터는 10 nF 및 100 nF 용량의 2개의 MLCC와 1개의 마일러 콘덴서(mylar capacitor)로 구성하였다. Y-커패시터는 용량 27 nF의 6개의 MLCC를 사용하여 구성하였다. X-커패시터만을 EMI 필터 로 적용한 경우, 전도성(conductive) EMI는 150 kHz ~ 30 MHz의 주파수 대역에서 EMI 전계강도가 허용 한계치를 초과 함을 알 수 있었다. 또한 방사성(radiative) EMI도 특정 주파수에서 EMI 전계 강도가 높고, 허용 마진폭도 매우 적음을 알 수 있었다. 반면 X, Y-커패시터를 적용하였을 경우, 전 주파수 대역에서 전도성 EMI가 크게 감소하였으며, 방사선 EMI도 충분한 마진이 확보됨을 알 수 있었다. 또한 X, Y-커패시터의 전기적인 신뢰성을 평가하기 위하여 절연 저항 (insulation resistance) 및 내전압 성능을 측정하였으며, 절연 저항 및 내저항 성능이 모두 전기적 신뢰성 기준을 만족함을 알 수 있었다. 결론적으로 MLCC 필터를 X, Y-커패시터로 사용하여 전도성 및 방사성 EMI 노이즈가 효과적으로 감소되 었고, 우수한 전기적인 신뢰성도 확보됨을 알 수 있었다.
Recently, as the data speed and operating frequencies of Ethernet keeps increasing, electro magnetic interference (EMI) also becomes increasing. The generation of such EMI will cause malfunction of near electronic devices. In this study, EMI filters were applied to reduce the EMI generated by DC-DC SMPS (switching mode power supply), which is the main cause of EMI generation of Ethernet switch. As the EMI filter, MLCCs with excellent withstanding voltage characteristics were used, which had advantages in miniaturization and mass production. Two types of EMI MLCC filters were used, which are X-capacitor and X, Y-capacitor. X-capacitor was composed of 2 MLCCs with 10 nF and 100 nF capacity and 1 Mylar capacitor. Y-capacitor was consisted of 6 MLCCs with a capacity of 27 nF. When only Xcapacitor was applied as EMI filter, the conductive EMI field strength exceeded the allowable limit in frequency range of 150 kHz ~ 30 MHz. The radiative EMI also showed high EMI strength and very small allowable margin at the specific frequencies. When the X and Y-capacitors were applied, the conductive EMI was greatly reduced, and the radiation EMI was also found to have sufficient margin. In addition, X, Y-capacitors showed very high insulation resistance and withstanding resistance performances. In conclusion, EMI X, Y-capacitors using MLCCs reduced the EMI noise effectively and showed excellent electrical reliability.
Electromagnetic Interference, Switching mode power supply, Filter, MLCC, Y-capacitors
1Department of Cogno-Mechatronics Engineering, Pusan National University, 2Department of Opto-Mechatronics Engineering, Pusan National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 107-111.
최근 고령화 사회가 진행이 되면서 건강과 진단에 대한 많은 관심이 증대되고 있다. 정확한 진단이 가능한 guided surgery를 위한 다양한 바이오 이미징 시스템 분야가 중요하게 대두되면서 정확한 측정과 실시간 확인 등이 가능 한 형광 이미징 시스템이 중요한 분야로 대두되었다. 현재 사용되고 있는 부분은 NIR-I이 주를 이루고 있으나 분해능의 향상 및 깊고 정확하게 형광을 확인하기 위해서 NIR-II 부분의 연구를 많이 진행 중에 있다. 본 논문에서는 NIR-I과 NIRII의 차이점과 광학적인 특성, 그리고 형광영상 시스템의 SBR(signal to background ration)에 대해서 NIR-II의 미(Mie) 산란을 유한요소(FEM)법을 이용하여 확인을 하였으며 최종적으로 Skin phantom을 제작 및 Fluorescence를 측정을 함으 로써 SBR이 NIR-I보다 NIR-II 영역에서 16.2배 더 높은 것을 확인하였다. 형광 이미징 시스템의 SBR 증대는 NIR-I영 역대 보다 NIR-II영역이 효과를 이룰 것으로 확인이 되며 이를 통해 guided surgery나 bio-sensor, 또한 형광을 이용한 전 자부품의 결함을 확인할 수 있는 디바이스 등의 다양한 응용분야에 활용할 수 있을 것으로 예상한다.
Recently, as an aging society progresses, a lot of interest in health and diagnosis is increasing, As the field of various bio-imaging systems for guided surgery capable of accurate diagnosis has emerged as important, a Fluorescence imaging system capable of accurate measurement and real-time confirmation has emerged as an important field. Fluorescence images currently being used are mainly in the NIR-I band, but many studies are in progress in the NIR-II band in order to improve resolution and confirm fluorescence deeply and accurately. In this paper, the difference between NIR-I and NIR-II, optical characteristics, and SBR (signal to background ration) of a fluorescent imaging system, was investigated using the finite element (FEM) method. After confirming, it was confirmed that the SBR was 16.2 times higher in the NIR-II area than in the NIR-I by making the skin phantom and measuring the fluorescence. It is confirmed that the enhancement in SBR of the Fluorescence imaging system is more effective in the NIR-II region than in the NIRI region and expected to be used in application fields such as guided surgery, bio-sensor and also device which can detect the defect of optical devices.
Fluorescence Imaging, NIR-IImaging, NIR-II Imaging, Mie scattering
1Department of Opto-Mechatronics Engineering, Pusan National University, 2Opto-mechatronics Research Institute, Pusan National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 113-117.
논문에서는 고분자 나노구조 필름의 기계적 물성을 향상하기 위하여 광열효과를 이용한 열처리 공정을 응용 하여 나노임프린트로 제작된 고분자 나노구조 필름의 기계적 물성에 미치는 영향을 규명하였다. Hybrid resin과 UV 나 노임프린트을 이용하여 저반사 나노구조를 성형하고 IPL (intense pulsed light)를 이용하여 열처리를 수행한 뒤, 제작된 나노구조 필름의 투과율과 내스크래치성을 평가하여 나노구조의 성형성과 기계적 물성의 변화를 관찰하였다. 나노패턴 의 특성에 의해서 나노구조의 투과율은 550 nm 파장에서 97.6%로 고투과율의 기능을 확인하였으며, IPL을 이용한 열처 리를 진행한 경우 Hotplate를 이용한 열처리보다 경도는 0.51 GPa로, 0.27 GPa로 열처리한 시편에 비해 1.8배 향상하였 으며, 동일 실험 조건에서 탄성율은 Hotplate 이용 시 4 GPa에서 IPL 이용 시 5.9 GPa로 1.4배 증가하였다.
In this paper, We investigated the effect of heat treatment process using photo-thermal effect in order to improve mechanical properties of nanostructure on polymer films made by nanoimprint process with hybrid resin. Nanostructures which have a low refractive characteristic were fabricated by UV nanoimprint and after that heat treatment was performed using IPL (intense pulsed light) under process condition of 550 V voltage, pulse width 5 ms, frequency 0.5 Hz. The transmittance and mechanical property of fabricated nanostructure films were evaluated to observe changes in the pattern transfer rate and mechanical properties of nanostructures. The transmittance of the nanostructure was measured at 97.6% at 550 nm wavelength. Nanoindentation was performed to identify improved anti-scatch properties. Result was compared by the heat source. In case of post treatment with IPL, hardness was 0.51 GPa and in the case of hotplate was 0.27 GPa, resulting the increase of hardness of 1.8 times. Elastic modulus of IPL treated sample was 5.9GPa and Hotplate treated one was 4GPa, showing the 1.4 time increase.
organic-inorganic hybrid resin, IPL, UV-NIL
Division of Materials Science and Engineering, Hanyang University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 119-125.
1.1~2.1eV의 직접 천이형 밴드갭을 가지는 전이금속 칼코게나이드(Transition Metal Dichalcogenide, TMDC) 는 빛에 대한 반응성이 크고 구조적 특징상 2차원 물질들과의 수직 이종접합구조를 형성하기 용이하다는 장점으로 차세 대 광전소자와 반도체소자 물질로서 대두되고 있다. 하지만 TMDC를 얻는 공정들의 한계로 인해 고품질, 대면적의 수직 이종접합구조의 형성에 어려움이 존재한다. 본 연구에서는 MOCVD 시스템을 제작하고, 단일층 TMDC 및 이들의 이종 구조에 제조에 대한 연구를 수행하였다. 특히, 버블러 타입의 유기금속화합물 소스를 활용하여, 반응기 내로 유입되는 소 스의 농도와 유량을 정밀하게 조절함으로써 전면적으로 균일한 박막을 얻을 수 있다. MOCVD로 MoS2, WS2 박막을 성 장시키고 주사전자현미경, UV-visible spectrophotometer, Raman spectroscopy, photoluminescence 분석을 진행하여 균일 한 박막을 성장시켰음을 확인하였다. 또한, MoS2 박막에 WS2 박막을 직접 성장시킴으로써 MoS2/WS2 수직 이종접합구 조를 형성하였다.
Transition metal dichalcogenides (TMDCs), two-dimensional atomic layered materials with direct bandgap in the range of 1.1-2.1 eV, have attracted a lot of research interest due to their high response to light and capability to build new types of artificial heterostructures. However, the large-area synthesis of high-quality and uniform TMDC films with vertical-stacked heterostructure still remains challenge. In this study, we have developed a metal-organic chemical vapor deposition (MOCVD) system for TMDCs and conducted a systematic study on the growth of single-layer TMDCs and their heterostructures. In particular, using a bubbler-type organometallic compound sources, the concentration and flow rate of each source can be precisely controlled to obtain uniformly single-layered MoS2 and WS2 films over the centimeter scale. In addition, the MoS2/WS2 vertical heterostructure was achieved by growing WS2 film directly on the MoS2 film, as confirmed by electron microscopy, UV-visible spectrophotometer, Raman spectroscopy, and photoluminescence spectroscopy.
TMDC, MOCVD, Vertical heterostructure, MoS2, WS2, two-dimensional material
Division of Materials Science and Engineering, Pusan National University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 127-133.
고분자 재료인 접착제와 금속 피착재 사이의 정량적인 접착강도 측정은 중요하다. 고분자 재료인 접착제와 금 속 피착재 사이의 접착강도 측정 시, 피착재의 종류와 두께 변화가 접착강도에 미치는 영향에 대해 연구하였다. 금속 피 착재의 종류로는 알루미늄과 스텐리스강 2종류가 선택되었으며, 접착강도의 측정에는 돌리테스트와 전단시험이 사용되 었다. 인장응력 방식의 돌리테스트로 고분자 접착제와 금속 피착재 사이의 접착강도 측정 시, 금속 피착재의 두께 변화는 접착강도의 크기에 거의 영향을 미치지 않았으나, 피착재의 종류에 따라 접착강도는 다르게 나타났다. 반면, 전단시험으 로 고분자 접착제와 금속 피착재 사이의 접착강도 측정 시, 금속 피착재의 상대적 두께 변화는 접착강도의 크기에 영향 을 주었다. 이유는 전단시험 시 접착부의 모서리 부분에서 발생하는 피착재의 휘어짐 현상은 접착부에 추가적인 인장응 력을 발생시켜 접착강도를 낮추는데 기여하기 때문이다. 이 연구의 결과, 돌리테스트는 피착재의 두께가 변해도 접착강 도의 변화가 거의 없기 때문에 고분자 접착제와 금속 피착재의 정량적인 접착강도 측정 시 널리 사용될 것으로 예상된다.
It is important to measure the quantitative adhesive strength between an organic adhesive and a metal adherend. In measuring the adhesive strength between an organic adhesive and a metal adherend, the effect of the kind and thickness of the adherend on the adhesive strength was studied. Two kinds of metal adherends were selected, aluminum (Al1050) and stainless steel (STS304), and a dolly test and a lap shear test were used to measure the adhesive strength. When measuring the adhesive strength between the organic adhesive and the metal adherend by the tensile stress mode of dolly test, the change in the thickness of the metal adherend had little effect on the adhesive strength, however, the adhesive strength was different depending on the kind of the adherend. On the other hand, when measuring the adhesive strength between the organic adhesive and the metal adherend by the lap shear test, the change in the relative thickness of the metal adherend had an effect on the adhesive strength. The reason is that the bending phenomenon of the adherend occurring in the edge of bonding region during the lap shear test contributes to lowering the adhesive strength by generating additional tensile stress in the bonding region. From this work, it is concluded that the dolly test could be widely used when measuring the quantitative adhesive strength of organic adhesives and metal adherend because there is little change in adhesive strength even though the thickness of the adherend is changed.
adhesive strength, organic adhesive, metal adherend, Dolly test, lap shear test.
Department of Materials Science and Engineering, Yonsei University
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 135-141.
실리카-벤젠 에어로겔은 균일하고 정렬된 네트워크 기공 구조, 개선된 기계적 특성을 갖도록 합성되었다. 실리 카 에어로겔의 기계적 특성을 향상시키기 위해 유기물을 첨가하는 것이 일반적인 방법이지만, 기공 특성이 유-무기 상분 리 현상으로 인해 감소한다. 본 연구에서는 실리카 기반 에어로겔의 기공 특성을 유지하면서 동시에 기계적 물성을 높이 기 위해 간단하고 저렴한 방법을 사용하였다. 기공 및 기계적 특성에 대한 하이드록실 결합수의 영향을 연구하기 위해 두 가지 유형의 벤젠 브리지 전구체를 사용하였다. 다공성 실리카 에어로겔은 간단하고 비용-효율적이며 무공해인 졸-겔방 법으로 제조되었다. 최종적으로 제조된 실리카-벤젠 에어로겔은 추가적인 silylating reagents없이 우수한 기공 특성, 높은 비 표면적(1,326 m2/g), 다공성 구조 및 소수성(>140°)을 가졌다. 일부 샘플(2T4)의 경우 기계적 강도는 순수 실리카 에 어로겔의 5 배 이상을 보였다.
The silica aerogels with benzene-bridged were designed to have uniform network structure, ordered pore structure, improved mechanical properties and excellent textural properties. Adding organic to enhance the mechanical properties of silica aerogels is a common method, but textural properties of aerogels with organic are reduced due to the organic-inorganic phase separation. In this paper, we use a simple and low-cost method to increase mechanical properties while maintaining textural properties of SiO2 aerogels. Two types of benzene-bridged precursors were prepared to study the effect of the number of hydroxyl band on the textural and mechanical properties. The porous silica aerogel was prepared by a simple, cost effective and pollution-free sol-gel method. This method does not require additional silylating reagents. The benzene-bridged silica aerogel samples prepared had excellent textural properties, high specific surface area (1,326 m2/g), porous structure and hydrophobicity (>140°). The mechanical strength of 2T4 is more than 5 times that of pure silica aerogel.
sol-gel, benzene-bridged, hydrophobic, textural property, mechanical property
Journal of the Microelectronics and Packaging Society, Vol. 27, No. , pp. 143-145.